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Mitsubishi Electric HITACHI VS-50111 Troubleshooting Manual page 31

Digital ready projection television, v20a chassis, v20c chassis, v20c+ chassis
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cuitry, IC2V01, is required for the sub picture signal.
Sub picture video is applied to pin 7 of IC2V01 and
sub picture horizontal sync to pin 5.
The internal circuitry in IC2V01 determines the pro-
grams rating and forwards the information over the
SUBCCD-SDA line to the Control µPC. If the sub
picture program rating changes, IC2V01 alerts the
µPC over the VCHIP-PB line and then sends the new
program rating over the SUBCCD-SDA line.
IC7A00 Microprocessor Inputs
PIN#
ABBREV.
6
SD2
7
SD1
20
AC-OFF
46
SHORT
47
XRAY
92
AFT1
93
AFT2
94
VBLANK-IN
95
VSYNC
97
HSYNC
DESCRIPTION
Sub Tuner Sync
Main Tuner Sync
Indicates Power Loss
Short on DC supply
Excess HV/Beam Current
Main Tuner AFT voltage
Sub Tuner AFT voltage
Video is blanked (deflection loss).
Vertical Sync from Doubler
Horizontal sync from Doubler
Table 2: Parallel Inputs
4-5
V20 Chassis Technical Training
Parallel Inputs/Outputs
Of course there are parallel (single purpose) inputs and
outputs to the µPC. Most of the inputs are status in-
puts. Parallel Inputs are listed in Table 1, giving the
input abbreviation, description (purpose) and the source
of that specific signal.
Parallel outputs are mainly control logic, or signals
such as On-screen display signals. Parallel outputs
are given in Table 2, along with the description and
the destination for that signal.
SOURCE
(KD-2)
(KF-6)
(KE-13)
Q9B01/D9B01/DB902
(KE-15)
TU1A01-20
TU1B01-20
(
) = Connector
and Troubleshooting Guide
Q1B32
Q1A32
PC9A21-3
(KH-5)
IC5A02-13
D5A13
(EB-7)
(EB-6)

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