Samsung UE9Z Training Manual page 21

Explanation of Main board
1 B13V _UP_PW
2 B13V _UP_PW
3 NC
4 ECHO_ODD_ TX0-
5 ECHO_ODD_ TX0+
6 ECHO_ODD_ TX1-
7 ECHO_ODD_ TX1+
8 ECHO_ODD_ TX2-
9 ECHO_ODD_ TX2+
10 DGND
11 ECHO_ODD_ TXCLK-
12 ECHO_ODD_ TXCLK+
13 DGND
14 ECHO_ODD_ TX3-
15 ECHO_ODD_ TX3+
16 ECHO_ODD_ TX4-
17 ECHO_ODD_ TX4+
18 ECHO_EVEN_ TX0-
19 ECHO_EVEN_ TX0+
20 ECHO_EVEN_ TX1-
20 . CN1220(DEBUG)
1
2
3
4
Pin Map
Pin Map
19 . CN1901(UPGRADE TV MODULE )
21 ECHO_EVEN_ TX1+
22 ECHO_EVEN_ TX2-
23 ECHO_EVEN_ TX2+
24 DGND
25 ECHO_EVEN_ TXCLK-
26 ECHO_EVEN_ TXCLK+
27 DGND
28 ECHO_EVEN_ TX3-
29 ECHO_EVEN_ TX3+
30 ECHO_EVEN_ TX4-
31 ECHO_EVEN_ TX4+
32 DGND
33 HUB2CPU_USB_DP
34 HUB2CPU_USB_DM
35 DGND
36 CPU2CPU_USB_DP
37 CPU2CPU_USB_DM
38 DGND
39 EXT _UART _RX
40 EXT _UART _ TX
DGND
SCL _DOWN
SDA _DOWN
DNGD
41 B13V _UP_PW 61
42 B13V _UP_PW 62
43 NC 63
44 LVDS _ODD_ TX0- 64
45 LVDS _ODD_ TX0+ 65
46 LVDS _ODD_ TX1- 66
47 LVDS _ODD_ TX1+ 67
48 LVDS _ODD_ TX2- 68
49 LVDS _ODD_ TX2+ 69
50 DGND 70
51 LVDS _ODD_ TXCLK- 71
52 LVDS _ODD_ TXCLK+ 72
53 DGND 73
54 LVDS _ODD_ TX3- 74
55 LVDS _ODD_ TX3+ 75
56 LVDS _ODD_ TX4- 76
57 LVDS _ODD_ TX4+ 77
58 LVDS _EVEN_ TX0- 78
59 LVDS _EVEN_ TX0+ 79
60 LVDS _EVEN_ TX1- 80
21 . CN1202( J TAG )
1
2
3
4
5
6
7
8
ECHO_EVEN_ TX1+
ECHO_EVEN_ TX2-
ECHO_EVEN_ TX2+
DGND
LVDS _EVEN_ TXCLK-
LVDS _EVEN_ TXCLK+
DGND
LVDS _EVEN_ TX3-
LVDS _EVEN_ TX3+
LVDS _EVEN_ TX4-
LVDS _EVEN_ TX4+
ECHO_ I 2STX1 _LRCLK
ECHO_ I 2STX1 _BCLK
ECHO_ I 2STX1 _SPK_MO IP
UP_MODULE _SYNC
EXT _GP I0 _NRESET
B3 .3V _PW
EXT _GP IO1 _WAKEUP
UP_MODULE _SPD I F
A5V _PW
B3 .3V _PW
A _NTRST
A _ TD I
A _ TMS
A _ TCK
A _ TDO
NC
DGND