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1
3. BLOCK DIAGRAM AND SCHEMATIC DIAGRAM
3.1 BLOCK DIAGRAM
A
A
CONTROL UNIT
CN301
4
VD5R0
OPT-IN
2
CN514 CN513
CN651
US+5V
1
1
1
D−
2
2
2
3
3
3
D+
4
4
4
RST
6
6
RESET
S401
B
C
CONNECTOR
PCB
CN701
BUS−
7
BUS+
11
IP-BUS IN
ASENB
4
C
BMUTE
8
D
SWBU
E
F
10
1
2
FULL SPEED
USB PERIPHERAL
IC651
CY7C68013A-100AXC
USBDM
18
41
DMINUS
RXD0
40
TXD0
37
PB3/FD3
USBDP
17
45
DPLUS
PB5/FD5
10
XOUT
X651
24MHz
11
XIN
Q700
AVCC1,2
VCC1-9
N33V
RXD1
POWER ON RESET
IC751
US+5V
S-80827CNUA-B8M
Q699
2
1
VDD
OUT
M3.3V
IC752
TC7SET04FUS1
IC701
HA12241FP
5
2
BUS−
ROUT
6
1
BUS+
DIN1
STBY
8
Q971
Q973
BATT
Q974
BATT
DC-DC CONV.
IC851
Q853
AN8011S
9
VCC
3
ON/OFF
Q851
7
OUT2
4
IN-2
Q854
Q852
10
OUT1
2
3
Q304
AUDIO CONTROL
IC601
PEG169A
24
67
TXD1
P00
25
68
RXD1
P01
27
1
P64
CLK4
6
80
CNVSS
SOUT4
79
SIN4
62
P05
61
P06
10
53
XOUT
P26
X601
43
P40
10MHz
51
P30
12
65
XIN
P02
63
P04
50
P31
49
P32
46
P35
45
P36
9
44
RESET
P37
47
P34
48
P33
42
P41
3
TC7WH04FU
1
5
3
CLK3
4
18
P81
RX
22
4
P71
SOUT3
TX
23
3
P70
P93
2
P94
IPPW
21
P76
Q932
BATT
ASENS
15
P84
BSENS
16
40
P83
P43
Q931
19
P80
Q982
IC899
TA78L12F
T851
1
3
+12VL
IN
OUT
IC898
TA78L12F
1
3
+12VR
IN
OUT
IC897
TA79L12F
T852
2
3
−12VL
IN
OUT
IC896
TA79L12F
2
3
−12VR
IN
OUT
RS-P90/EW5
3
5V → 3V
IC304
TC7SH32FUS1
1
4
INB
OUTY
IC150
7
CLR
5
CLKIN
ELDATA
EVOLENB
EVOLSTB
IC935
TPD1018F
6
1
IN
OUT
SWBU
VBUM
SWBU
ASENM
Q941
Q983
VBUM
DC-DC CONV.
IC801
AN8011S
9
SWBU
VCC
3
ON/OFF
Q802
10
OUT1
13
IN-1
Q801
7
OUT2
4
IN-2
4
4
CN302
DATA IN
B
CN2101
1
CN601
B
PLDSEL0
32
PLDSEL1
30
PLDCLK
28
PLDOUT
26
PLDIN
24
nSTATUS
22
nCONFIG1
20
nCONFIG2
18
DSPSTOP
16
DSPERR
14
B
CN3201
PLDRST
12
CONFDONE
10
B
DIREMFLG
8
DIRADFLG
7
DIRBRATE0
6
DIRBRATE1
5
DIRRST
4
DITRST
3
DIRUNLOCK
9
UMUTE
2
CN902
BATT
2
VBUM
4.0A
1
CN901
B.U
2
BREM
3
Q911
I
S-812C
Q912
2
VIN
I
S-812C
DLMN
Q972
2
VIN
Q984
MUTE
IC934
S-812C50AU
Q804
2
VIN
VO
IC933
S-812C50AU
2
VIN
VO
IC932
S-812C50AU
2
VIN
VO
IC931
S-812C50AU
2
VIN
VO
Q803
Q812
Q811
Q814
Q815
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