Acer A315-53G Service Manual page 133

Functionality Name
(Include\PostCode.h)
SEC_SYSTEM_POWER_ON
SEC_BEFORE_MICROCODE_PATCH
SEC_AFTER_MICROCODE_PATCH
SEC_ACCESS_CSR*
SEC_GENERIC_MSRINIT*
SEC_CPU_SPEEDCFG*
SEC_SETUP_CAR_OK
SEC_FORCE_MAX_RATIO*
SEC_GO_TO_SECSTARTUP
SEC_GO_TO_PEICORE
NOTE: * 3rd party relate functions - Platform dependence.
Functionality Name
(Include\PostCode.h)
PEI_SIO_INIT
PEI_CPU_REG_INIT
PEI_CPU_AP_INIT*
PEI_CPU_HT_RESET*
PEI_PCIE_MMIO_INIT
PEI_NB_REG_INIT
PEI_SB_REG_INIT
PEI_PCIE_TRAINING*
PEI_TPM_INIT
PEI_SMBUS_INIT
PEI_PROGRAM_CLOCK_GEN
Troubleshooting
Table 4-3. SEC Phase POST Code Table
Phase
SEC
SEC
SEC
SEC
SEC
SEC
SEC
SEC
SEC
SEC
Table 4-4. PEI Phase POST Code Table
Phase
PEI
PEI
PEI
PEI
PEI
PEI
PEI
PEI
PEI
PEI
PEI
Post
Description
Code
CPU power on and switch to
01
Protected mode
02 Patching CPU microcode
03 Setup Cache as RAM
PCIE MMIO Base Address
04
initial
CPU Generic MSR
05
initialization
06 Setup CPU speed
07 Cache as RAM test
Tune CPU frequency ratio to
08
maximum level
09 Setup BIOS ROM cache
0A Enter Boot Firmware Volume
Post
Description
Code
70 Super I/O Initialization
71 CPU Early Initialization
72 Multi-processor Early Initial
73 HyperTransport Initialization
74 PCIE MMIO BAR Initialization
75 North Bridge Early Initialization
South Bridge Early
76
Initialization
77 PCIE Training
78 TPM Initialization
79 SMBUS Early Initialization
7A Clock Generator Initialization
4-21