HP 8112A Operating, Programming And Servicing Manual page 84

Limit Errpr
Note
6-14 Programming
The SRQ bit generates an interrupt at the system controller to
indicate that the instrument requires attention. You can use this
facility as the basis of interrupt driven error handling in your
programming application.
The SRQ, Programming Error, Syntax Error and System Error bits
are latched until the status byte is polled by the system controller.
The other status bits represent the current condition at the time the
status byte is read.
You can obtain more detailed information about timing and
programming errors using the interrogate error (IER.R) mnemonic.
The HP 8 1 12A responds with a string describing the current error
conditions. The descriptions are covered in subsequent parts of this
section.
D IM E$ [45]
OUTPUT 7 1 2 ; " IERR"
ENTER 7 12 ; E$
PRINT " 8 1 12A Error = " ; E$
There are two types of error which set the limit error bit in the
status byte. The conditions which cause them and the description
(Bit 0)
used by the HP 8 1 12A when replying to an IERR command are
listed below. The limit error bit is not latched, therefore a transient
error is only recorded by generating an SRQ .
More than one error condition can occur at one time. When using
the IERR command ensure that you allow for a reply containing
more than one error description.
IERR Description
LIMIT ERROR
Bit Meaning
0
LIMIT ERROR (Causes SRQ)
1 TIMING ERROR (Causes SRQ)
2 SYNTAX ERROR (Causes SRQ)
3 SLOPE ERROR (Causes SRQ)
5 INPUT ERROR (Causes SRQ)
6 SERVICE REQUEST ( =SRQ)
7 BUFFER NOT EMPTY
Allocate memory for error string
Request error information
Read reply into allocated string
Comments
This error appears only when the limit is on
and: