Related Manuals for Asus AAEON BOXER-6405U
Summary of Contents for Asus AAEON BOXER-6405U
- Page 1 BOXER-6405U Fanless Embedded Box PC User’s Manual 2 Last Updated: January 30, 2019...
- Page 2 Copyright Notice This document is copyrighted, 2019. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
- Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp. Intel, Pentium, Celeron, and Xeon are registered trademarks of Intel Corporation Atom is a trademark of Intel Corporation ...
- Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity BOXER-6405U 2 Pin DC-In Power Connector Wallmount bracket Screw Package If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
- Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document.
- Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. All cables and adapters supplied by AAEON are certified and in accordance with the material safety laws and regulations of the country of sale.
- Page 7 As most electronic components are sensitive to static electrical charge, be sure to ground yourself to prevent static charge when installing the internal components. Use a grounding wrist strap and contain all electronic components in any static-shielded containers. If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii.
- Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
- Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Embedded Box PC/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○ 连接器及线材...
- Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Embedded Box PC/ Industrial System Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...
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Page 11: Table Of Contents
Table of Contents Chapter 1 - Product Specifications ..................1 Specifications ........................2 Chapter 2 – Hardware Information ..................4 Dimensions ........................5 Jumpers and connectors ..................... 6 List of Jumpers ........................ 7 2.3.1 Setting Jumpers ..................7 2.3.2 Auto Power Button Selection (JP1) ..........8 2.3.3 Clear CMOS (JP2).................. - Page 12 Setup Submenu: Advanced ..................27 3.4.1 Advanced: Trusted Computing ............28 3.4.2 Advanced: CPU Configuration............29 3.4.3 Advanced: SATA Drives ..............32 3.4.4 Advanced: Hardware Monitor ............33 3.4.5 Advanced: SIO Configuration ............34 3.4.5.1 SIO Configuration: Serial Port 1 Configuration ..... 35 3.4.5.2 SIO Configuration: Serial Port 2 Configuration.....
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Page 13: Chapter 1 - Product Specifications
Chapter 1 Chapter 1 - Product Specifications... -
Page 14: Specifications
Specifications System Intel® Celeron® processor N3350 Intel® System on Chip Chipset DDR3L 2G 1600 On-board System Memory HDMI Display Interface 16 or 32G eMMC On-board Storage Device RJ-45 x 2 for 10/100/1000 base-T (Intel i211) Ethernet LAN x 2 USB 3.0 x 4 HDMI x 1 DB9 x 2 for RS-232 2-pin 9~24V DC Power Input x 1 Power Button... - Page 15 Mechanical Wallmount Mounting 166mm (W) x 37mm (H) x 106.6mm (D) Dimensions (W x H x D) 3.6 lb (1.6kg) Gross Weight 1.76 lb (0.8 kg) Net Weight Environmental -20°C ~ 50°C with W.T. SSD/HDD/mSATA Operating Temperature (according to IEC68-2-14 with 0.5 m/s AirFlow ; with industrial devices) -40°F ~ 158°F (-40°C ~ 70°C) Storage Temperature...
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Page 16: Chapter 2 - Hardware Information
Chapter 2 Chapter 2 – Hardware Information... -
Page 17: Dimensions
Dimensions BOXER-6405U Chapter 2 – Hardware Information... -
Page 18: Jumpers And Connectors
Jumpers and connectors Chapter 2 – Hardware Information... -
Page 19: List Of Jumpers
List of Jumpers Please refer to the table below for all of the system’s jumpers that you can configure for your application Label Function Auto-Power Button Selection CMOS Control Selection 2.3.1 Setting Jumpers You configure your card to match the needs of your application by setting jumpers. A jumper is the simplest kind of electric switch. -
Page 20: Auto Power Button Selection (Jp1)
2.3.2 Auto Power Button Selection (JP1) 1 2 3 1 2 3 ATX (Default) Function ATX (Default) * Disable Auto Power Button JP1 (1-2): Need to use power button JP1 (1-2) to power on the system. 2.3.3 Clear CMOS (JP2) 1 2 3 Normal (Default) Clear CMOS... -
Page 21: List Of Connectors
List of Connectors Please refer to the table below for all of the system’s connectors that you can configure for your application Label Function COM1 RS232 COM2 RS232 Mini-PCIE slot Mini-PCIE slot CN13 SATA1 CN16 SATA PWR Connector CN18 HDMI Connector CN23 Phoenix connector Power input CN27... -
Page 22: Com Port 1 (Wafer Box, Optional) (Cn5)
2.4.1 COM Port 1 (Wafer Box, Optional) (CN5) Pin Name Signal Type Signal Level DCD1 DSR1 RTS1 ±9V ±9V CTS1 DTR1 ±9V 2.4.2 COM Port 2 (Wafer Box, Optional) (CN6) Pin Name Signal Type Signal Level DCD2 DSR2 RTS2 ±9V ±9V Chapter 2 –... -
Page 23: Mini-Card Slot (Half-Mini Card) (Cn7)
Pin Name Signal Type Signal Level CTS2 DTR2 ±9V 2.4.3 Mini-Card Slot (Half-Mini Card) (CN7) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3V +3.3V +1.5V +1.5V PCIE_CLK_REQ# PCIE_REF_CLK- DIFF PCIE_REF_CLK+ DIFF Chapter 2 – Hardware Information... - Page 24 Pin Name Signal Type Signal Level W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3VSB +3.3V Chapter 2 – Hardware Information...
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Page 25: Mini-Card Slot (Full-Mini Card) (Cn8)
Pin Name Signal Type Signal Level +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V 2.4.4 Mini-Card Slot (Full-Mini Card) (CN8) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3V +3.3V Chapter 2 – Hardware Information... - Page 26 Pin Name Signal Type Signal Level +1.5V +1.5V PCIE_CLK_REQ# PCIE_REF_CLK- DIFF PCIE_REF_CLK+ DIFF W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V Chapter 2 – Hardware Information...
- Page 27 Pin Name Signal Type Signal Level PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V Chapter 2 – Hardware Information...
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Page 28: Sata Port (Cn13)
2.4.5 SATA Port (CN13) Pin Name Signal Type Signal Level SATA_TX+ DIFF SATA_TX- DIFF SATA_RX- DIFF SATA_RX+ DIFF 2.4.6 +5V Output for SATA HDD (2P Pitch : 2.0mm) (CN16) Pin Name Signal Type Signal Level Chapter 2 – Hardware Information... -
Page 29: Hdmi Connector (Cn18)
2.4.7 HDMI Connector (CN18) Pin Name Signal Type Signal Level HDMI_1_DATA2_P HDMI_1_DATA2_N DIFF HDMI_1_DATA1_P DIFF HDMI_1_DATA1_N DIFF HDMI_1_DATA0_P DIFF HDMI_1_DATA0_N DIFF HDMI_1_CLK_C_P DIFF HDMI_1_CLK_C_N DIFF HDMI_1_SCL HDMI_1_SDA +V5S_HDMI_1_CON HDMI_1_HPD Chapter 2 – Hardware Information... -
Page 30: Dc-In Connector (2P) (Cn23)
2.4.8 DC-IN CONNECTOR (2P) (CN23) Pin Name Signal Type Signal Level +9V~+24V 2.4.9 LAN (RJ-45) + USB3.0 (CN27) Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF MDI3- DIFF Chapter 2 –... -
Page 31: Dual Usb3.0 (Cn28)
Pin Name Signal Type Signal Level +5VSB USB0_D- DIFF USB0_D+ DIFF USB0_SSRX− DIFF USB0_SSRX+ DIFF USB0_SSTX− DIFF USB0_SSTX+ DIFF 2.4.10 DUAL USB3.0 (CN28) Port 1 11 12 13 Port 0 2 3 4 Pin Name Signal Type Signal Level +5VSB Chapter 2 –... -
Page 32: Lan (Rj-45) + Usb3.0 (Cn29)
Pin Name Signal Type Signal Level USB0_D- DIFF USB0_D+ DIFF USB0_SSRX− DIFF USB0_SSRX+ DIFF USB0_SSTX− DIFF USB0_SSTX+ DIFF +5VSB USB1_D- DIFF USB1_D+ DIFF USB1_SSRX− DIFF USB1_SSRX+ DIFF USB1_SSTX− DIFF USB1_SSTX+ DIFF 2.4.11 LAN (RJ-45) + USB3.0 (CN29) Chapter 2 – Hardware Information... - Page 33 Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF MDI3- DIFF Pin Name Signal Type Signal Level +5VSB USB0_D- DIFF USB0_D+ DIFF Chapter 2 – Hardware Information...
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Page 34: Wall Mount Bracket Installation
Pin Name Signal Type Signal Level USB0_SSRX− DIFF USB0_SSRX+ DIFF USB0_SSTX− DIFF USB0_SSTX+ DIFF Wall mount bracket installation Attach the wall mount bracket onto the chassis and secure the screws. Chapter 2 – Hardware Information... -
Page 35: Chapter 3 - Ami Bios Setup
Chapter 3 Chapter 3 - AMI BIOS Setup... -
Page 36: System Test And Initialization
System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory. -
Page 37: Ami Bios Setup
AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>... -
Page 38: Setup Submenu: Main
Setup Submenu: Main Chapter 3 – AMI BIOS Setup... -
Page 39: Setup Submenu: Advanced
Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup... -
Page 40: Advanced: Trusted Computing
3.4.1 Advanced: Trusted Computing Options summary: Security Device Disabled Support Enabled Optimal Default, Failsafe Default Enable/Disable Security Device. NOTE: Your Computer will reboot during restart in order to change State of the Device. Chapter 3 – AMI BIOS Setup... -
Page 41: Advanced: Cpu Configuration
3.4.2 Advanced: CPU Configuration Chapter 3 – AMI BIOS Setup... - Page 42 Options summary: Active Processor Disabled Optimal Default, Failsafe Default Cores Enabled Number of cores to enable in each processor package Intel Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.
- Page 43 mode Max battery Select the performance state that the BIOS will set before OS handoff Power Limit 1 Enable Disabled Optimal Default, Failsafe Default Enabled Enable/Disable Power Limit 1 C-States Disabled Optimal Default, Failsafe Default Enabled Enable/Disable C States Chapter 3 – AMI BIOS Setup...
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Page 44: Advanced: Sata Drives
3.4.3 Advanced: SATA Drives Options summary: Chipset SATA Enable Optimal Default, Failsafe Default Disable Enable or Disable the Chipset SATA Controller. The Chipset SATA controller supports the 2 black internal SATA ports (up to 3Gb/s supported per port) Port Enable Optimal Default, Failsafe Default Disable Enable or Disable SATA Port... -
Page 45: Advanced: Hardware Monitor
3.4.4 Advanced: Hardware Monitor Chapter 3 – AMI BIOS Setup... -
Page 46: Advanced: Sio Configuration
3.4.5 Advanced: SIO Configuration Chapter 3 – AMI BIOS Setup... -
Page 47: Sio Configuration: Serial Port 1 Configuration
3.4.5.1 SIO Configuration: Serial Port 1 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8; IRQ=4; IO=2F8; IRQ=3; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts. -
Page 48: Sio Configuration: Serial Port 2 Configuration
3.4.5.2 SIO Configuration: Serial Port 2 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8; IRQ=3; IO=3F8; IRQ=4; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts. -
Page 49: Power Management
3.4.6 Power Management Options summary: Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select system power mode. Restore AC Power Loss Last State Optimal Default, Failsafe Default Always On Always Off RTC wake system from S5 Disabled Optimal Default, Failsafe Default Fixed Time Dynamic Time Enable or disable System wake on alarm event. -
Page 50: Setup Submenu: Chipset
Setup submenu: Chipset Chapter 3 – AMI BIOS Setup... -
Page 51: Chipset: North Bridge
3.5.1 Chipset: North Bridge Options summary: DCMT Total Gfx 128M Optimal Default, Failsafe Default 256M Select DVMT5.0 Total Graphics Memory size used by the Internal Graphics Device Chapter 3 – AMI BIOS Setup... -
Page 52: Chipset: South Bridge
3.5.2 Chipset: South Bridge Options summary: HD-Audio Support Disable Optimal Default, Failsafe Default Enable Enable/Disable HD-Audio Support Full Mini Card Speed Auto Optimal Default, Failsafe Default Gen 1 Gen 2 Configure PCIe Speed Half Mini Card Speed Auto Optimal Default, Failsafe Default Gen 1 Gen 2 Configure PCIe Speed... -
Page 53: Setup Submenu: Security
Setup submenu: Security Change User/Administrator Password You can set a User Password once an Administrator Password. The password will be required during boot up, or when the user enters the Setup utility. Please Note that a User Password does not provide access to many of the features in the Setup utility. Select the password you wish to set, press Enter to open a dialog box to enter your password (you can enter no more than six letters or numbers). -
Page 54: Secure Boot
3.6.1 Secure Boot Options summary: Attempt Secure Boot Disable Optimal Default, Failsafe Default Enable Secure Boot activated when Platform Key(PK) is enrolled,System mode is User/Deployed, and CSM function is disabled Secure Boot Mode Standard Optimal Default, Failsafe Default Customized Secure Boot Mode – Custom & Standard, Set UEFI Secure Boot Mode to STANDARD mode or CUSTOM mode, this change is effect after save.And after reset,the mode will return to STANDARD mode Chapter 3 –... -
Page 55: Key Management
3.6.2 Key management Enables expert users to modify Secure Boot Policy variables without full authentication Options summary: Provision Factory Disable Optimal Default, Default keys Failsafe Default Enable Allow to provision factory default Secure Boot keys when System is in Setup Mode Install Factory Default Press ‘Yes’... - Page 56 Options summary: Enroll Efi Image Acpi(a0341d0, 0)\PCI(12|0)\DevicePath(Type $AttrDef 3, SubType 18)HD(Part1, Sig )\ $BadClus $Bitmap $Boot $LogFile $MFT $MFTMirr $Secure $UpCase $Volume <System Volume Information> <.> <$Extend> Acpi(a0341d0, 0)\PCI(12|0)\DevicePath(Type <EFI> 3, SubType 18)HD(Part2, Sig )\ Acpi(a0341d0, 0)\PCI(12|0)\DevicePath(Type $AttrDef 3, SubType 18)HD(Part4, Sig )\ $BadClus $Bitmap $Boot...
- Page 57 Enroll Efi Image <Documents and Settings> <.> <$Recycle.Bin> <$Extend> Allow the image to run in Secure Boot mode. Enroll SHA256 Hash Certificate of the Image into Authorized Signature Database (db) Save all Secure Boot Acpi(a0341d0, 0)\PCI(12|0)\ variables DevicePath(Type 3,SubType 18)HD(Part1, Sig ?)\ Acpi(a0341d0, 0)\PCI(12|0)\ 1 variable(s) DevicePath(Type 3,SubType 18)HD(Part2, Sig ?)\...
- Page 58 Append Key No Press ‘Yes’ to load factory default ‘dbx’ or Select ‘No’ to load it from a File on external media Authorized TimeStamps| 0 | Set New Var No 0 | No Key Press ‘Yes’ to load factory default ‘dbt’ or Select ‘No’...
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Page 59: Setup Submenu: Boot
Setup submenu: Boot Options summary: Quiet Boot Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Quiet Boot option Network Stack Disabled Optimal Default, Failsafe Default Enabled Enable/Disable UEFI Network Stack Chapter 3 – AMI BIOS Setup... -
Page 60: Setup Submenu: Save & Exit
Setup submenu: Save & Exit Chapter 3 – AMI BIOS Setup... -
Page 61: Chapter 4 - Drivers Installation
Chapter 4 Chapter 4 – Drivers Installation... -
Page 62: Driver Installation
Driver Installation Please download the drivers from http://www.aaeon.com/ and follow the sequence below to install the drivers. Step 1 – Install Chipset Drivers Open the Step 1 - Chipset folder and select your OS Open the SetupChipset.exe file in the folder Follow the instructions Drivers will be installed automatically Step 2 –... - Page 63 Drivers will be installed automatically Step 5 – Install Audio Drivers Open the Step 5 – Audio folder and select your OS Open the 0006-64bit_Win7_Win8_Win81_Win10_R279.exe file Follow the instructions Drivers will be installed automatically Step 6 – Install Serial IO Drivers Open the Step 6 –Serial IO Driver folder and select your OS Open the SetupSerialIO.exe file Follow the instructions...
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Page 64: Appendix A - Watchdog Timer Programming
Appendix A Appendix A - Watchdog Timer Programming... -
Page 65: Watchdog Timer Initial Program
Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value... -
Page 66: Watchdog Sample Program
A.2 Watchdog Sample Program ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4... - Page 67 ************************************************************************************ VOID Main(){ // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ************************************************************************************ Appendix A – Watchdog Timer Programming...
- Page 68 ************************************************************************************ // Procedure : AaeonWDTEnable VOID AaeonWDTEnable (){ WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 1); // Procedure : AaeonWDTConfig VOID AaeonWDTConfig (){ // Disable WDT counting WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 0); // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting(); VOID WDTEnableDisable(byte LDN, byte Register, byte BitNum, byte Value){ SIOBitSet(LDN, Register, BitNum, Value);...
- Page 69 ************************************************************************************ VOID SIOEnterMBPnPMode(){ IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); VOID SIOExitMBPnPMode(){ IOWriteByte(SIOIndex, 0xAA); VOID SIOSelectLDN(byte LDN){ IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, LDN); VOID SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value){ Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData);...
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Page 70: Appendix B - I/O Information
Appendix B Appendix B - I/O Information... -
Page 71: I/O Address Map
I/O Address Map Appendix B – I/O Information... -
Page 72: Memory Address Map
Memory Address Map Appendix B – I/O Information... -
Page 73: Irq Mapping Chart
IRQ Mapping Chart Appendix B – I/O Information... - Page 74 Appendix B – I/O Information...
- Page 75 Appendix B – I/O Information...
- Page 76 Appendix B – I/O Information...
- Page 77 Appendix B – I/O Information...
- Page 78 Appendix B – I/O Information...
- Page 79 Appendix B – I/O Information...
- Page 80 Appendix B – I/O Information...
- Page 81 Appendix B – I/O Information...