Heathkit H9 Manual page 63

The Terminal is released from the hold screen mode
by pressing either the Scroll key (S70a pin z : logic 1)
or the Erase Page key (5704 pin Z : logic 1). When
either key is pressed the output (pin 1L) of IC739D
goes high and the next 7C pulse resets flip-flop
IC733C and D. The 8 output (pin 8l goes high,
enabling IC739C. This lets the 7C pulse preset
flip-flops IC709A and IC709B (Q :
1). All three
flip-flops are then back to their normal states.
The scroll command from IC7418 pin 6 is inverted
and applied to one input (pin 1) of NAND Catg
IC741A. The other input (pin 2) is driven by the Q
output (pin 8) of the transmit page flip-flop, IC731C.
The scroll is inhibited when the Terminal is in the
tra n s m i t page m ode (0 : 0 ) .
The scroll command from pin 3 of IC741A drives one
input (pin 1.a) of ROM IC724. The ROM outputs a
logic 1 ffrom pin 3) to the RAM and counter circuit
b o a r d ( on T P U cyc le 3), This sign a l co un ts up t he
scroll counter and changes the start of page address.
Simultaneously, it drives one input (pin 2) of NAND
gatelC722A. The other input is connected to the Plot
k ey ( S 704 pi n 1) .
Scroll erase is inhibited when the plot mode is
selected. The plot signal (S70a pin 1) is logic 1 for the
normal mode and logic o for the plot mode.
If the Terminal is not in the plot mode and the scroll
command occurs, the output (pin 3) of IC722A goes
low. This presets flip-flop lC723A, which starts the
erase cycle.
When the Q output (ngL A1 of lC723A goes low, the
RAM
write signal (A write), coming from the
character generator (S705 pin B) appears at the output
(pin 10) of lC737C. This causes lC726A to turn on the
special character generator on the keyboard (via A2,
S7O4 pin 8) which puts a space on the bus.
Simultaneously, through the output of IC737A (S7oo
pin 3), the RAMs are put into the write mode and the
space that was on the bus is now stored in the RAM.
The RAM count-up signal, coming from the character
generator circuit board (5705 pin 7) addresses the
next RAM location and another space is stored in the
RAM. The RAM counter continues to access all of the
RAM locations in the same row or block of characters
until spaces have been written in the entire row or
block. During TPU cycle 6 the erase flip-flop (IC723A)
is cleared (the clear comes fromlC724 pin a) and the
erase procedure stops. While erasing was going on,
TPU cycle 3 counted up the scroll counter to move the
start of page address to the next line or block of
characters. See Pictorials 4-72 and 4-13 (Illustration
Booklet, Page 10) for a summary of the scrolling oper-
ation.
ERASING
Erasing the page or erasing to the end of line are
accomplished in basically the same manner as the
scroll erase. The write (S705-8) and count-up (S705-7)
signals from the character generator circuit board put
spaces on the bus and generate write signals for the
RAMs. The erase to end of line [EOL) function (from
keyboard key ERASE EOL, S704-12) causes the erase
flip-flop (lC723A) to be set on TPU cycle 2 by the
output (pin 13) of lC737D. The RAM counts up and
writes a space in each location until an end of line
signal is received. lC73O generates the end of line
indication. In short form a +20 end of line signal
stops the RAM counter from counting up. In long
form the + 20 end of line signal is ANDed with the +4
end of line signal to stop the RAM counter. This EOL
signal comes from pin 7 of IC73O.It drives one input
(pin 5) of AND gate IC72 98. The other input is driven
from the scroll command When both inputs to NAND
gatelCT2gB are high, the output (pin 6) places a logic
0 on one input (pin 6) of NAND gale lC737B. This
forces the output (pin ) of lC737B to logic 0. A logic 0
on one input (pin 9) of lC722C causes a logic 0 at the
output (pin 8), which stops the RAM count up (C.U.
+ 20) .
During TPU cycle 3, pin 4 of IC724 clears erase flip-
floplCT23A and the erasing will stop. Whenever the
Erase Page key is pressed(S7Oa-z), the output (pin 3)
of open collector buffer lC715A holds the erase flip-
flop (IC723A) preset. Erasing 960 characters takes less
than L millisecond so the screen is totally erased
many times while the key is held down. The erase
page key presets IC723B, which automatically puts
the cursor at the start of page (home) position at the
end of the erase. It does this by driving open collector
buffer IC715D and forcing a logic 0 at the "cursor
home" input (pin 13) of 1C728.
CURSOR
The RAM and counter circuit description describes
how the cursor moves as a result of a writing opera-
tion; however, the cursor can also be moved indepen-
dently of writing operations by the cursor controls
and through some non-writing data coming in on the
bus. The cursor controls on the keyboard set latches
(on the keyboardl during the scan time. The latch
outputs enter the TPU circuit board at P701-1, -2, -3,
and -4. They each drive one input of NAND gates
IC727A, B, C, and D. When a latch is set, the corres-