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A
B
C
1
2
D1
3
TP2
D6
TP1
D7
4
TP3
E6
5
D100
D101
6
CN1
7
S1
8
9
10
11
12
13
. . . . . DIO-62/63 board
<LED>
D1 (A-3) : + + + + + 12 V
+12 V power supply status indication.
Lit when the +12 V power is supplied.
If this LED does not light, the fuse may have blown.
D5 (A-3) : + + + + + 5 V (DIO-62 board)
+5 V power supply status indication.
Lit when the +5 V power is supplied.
D6 (A-4) : + + + + + 3.3 V
+3.3 V power supply status indication.
Lit when the +3.3 V power is supplied.
D7 (A-5) : + + + + + 2.5 V
+2.5 V power supply status indication.
Lit when the +2.5 V power is supplied.
MVS-8000SF
D
E
F
G
TP2000
E5
TP2002
TP4000
TP1001
TP1501
TP1000
TP1500
TP4002
E7
TP6
H
J
K
L
TP2500
TP3000
TP3500
TP2001
TP2501
TP3001
TP3002
TP2502
TP4
E4
TP4500
TP5000
TP5500
TP4001
TP4501
TP5001
TP4502
TP5002
TP5
D100 (A-5) : CONF1
H2 to L2 FPGA (Spartan II) CONFIG DONE status
indication.
Not lit when configuration is completed.
D101 (A-6) : CONF2
D10 to L10 FPGA (Spartan II) CONFIG DONE status
indication.
Not lit when configuration is completed.
<Switch>
S1 (A-7) : DIO reset switch
Pressing this switch initializes the CPU on the DIO-62 and
DIO-63 board.
<Connector>
CN1 (A-6) : ISP common connector
Used only for production in the assembly factory. Used for
program writing into the JTAG device with ISP.
1-8. Checks on Completion of Installation
M
N
P
R
E1
TP3501
TP3502
E2
TP5501
TP5502
E3
DIO-63 board A side/Component side
1-47
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