Motorola MVME162P-344 Series Installation And Use Manual page 145

P
P1 and P2 connectors 4-19,
parameters, ENV command
parity DRAM emulations
part numbers, SIM 1-10
Petra ASIC
Abort switch interrupt
control of BBRAM and clock
control of Flash access time
IP bus Strobe* signal 1-13, 2-7,
IP2 function 1-8, 4-15
LAN coprocessor support
local bus timeout function
logic duplicated in VMEchip2
MC2 function 1-15, 1-17, 2-5,
MCECC function 1-21
memory controller emulations
programmable tick timers
SCSI controller support
SRAM control 4-9
watchdog timer 4-18
pin assignments, connector
port number(s), debugger command
power requirements A-1
powering up the board 2-1
power-save mode 4-9
preparing the board 1-1
processor
bus structure 4-6
cache memory 4-6
location monitors 1-27
programmable tick timers
Q
QIC-02 streaming tape drive
R
regulatory compliance A-4
related specifications E-3
relative humidity A-1
remote control/status connector (J6) 4-20,
5-3
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RESET switch
resetting the system 2-1,
5-6
RF emissions, minimizing 1-24,
3-11
ROMboot process
1-16
S
safety procedures
4-12
SCC (serial communications controller)
4-11
SCSI
4-11
4-16
4-17
4-18
4-7
4-13
4-7
4-17
SD command
4-17
SDRAM (synchronous DRAM)
sequential access devices
5-1
serial
3-5
4-17
serial interface modules (SIMs)
D-4
serial port 2, MVME712M 4-13,
4-20
2-12
2-10
1-4
common command set (CCS) devices
D-2, D-4
controller (53C710) 4-17
direct access devices D-2
interface 4-17
sequential access devices
termination 4-17
terminator configuration
terminator power 1-27
2-14
options 4-7
D-4
communication parameters
communications controller (SCC)
communications interface 1-28,
communications interface (port 1
signals) 5-6
communications interface (port 2
signals) 5-5
connectors 4-19
interfaces and transition boards
connector 5-4
considerations for transition modules
4-15
installation 1-11
model numbers 4-13
part numbers 1-10
removal 1-10
selection 1-9
A-4
2-8
D-2
4-17
2-4
2-8
4-12
4-15
N
D
E
X
4-14
IN-5
I