Dg-Board (1 Of 3) Block Diagram - Panasonic TH-50PV60L Service Manual

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TH-50PV60L
5.4.

DG-Board (1 of 3) Block Diagram

DG
MICOM,DIGITAL SIGNAL PROCESSOR/
HDMI INTERFACE
DG9
HDMI 1 IN
1
D2+
D2G
3
D2-
D1+
5
D1G
D1-
7
D0+
D0G
9
D0-
CLK+
11
CLKG
CLK-
13
CEC
N.C.
15
SCL
DDC DATA
17
DDCG
+5V
19
HPDT
1
D2+
D2G
3
D2-
D1+
5
D1G
D1-
7
D0+
D0G
9
D0-
CLK+
11
CLKG
CLK-
13
CEC
N.C.
15
SCL
DDC DATA
17
DDCG
+5V
19
HPDT
DG8
HDMI 2 IN
TH-50PV60L
DG-Board (1 of 3) Block Diagram
MAIN 5V
HOTPLUG
Q4066
Q4067
Q4082
CABLE IN;Hi/NORM
CABLE OUT;LOW/MUTE
HDMI_WP
Q4069
IC4023
EEPROM
DDC_SDA0
3.3V_SDA
7
5
WC
SDA
D1
S1
DDC_SCL0
3.3V_SCL
SCL
6
D2
S2
Q4070
5V
3.3V
32
31
102
104
ROX2+
2
52
ROX2-
51
4
ROX1+
48
6
ROX1-
TMDS DATA
47
RECEIVER
ROX0+
44
AND
8
ROX0-
TMDS DECODER
43
10
ROXC+
40
ROXC-
12
39
CPU
14
HDCP
CIPHER DECRYPTOR
16
18
R1X2+
2
71
R1X2-
70
4
R1X1+
67
6
R1X1-
TMDS DATA
66
RECEIVE
R1X0+
8
63
AND
R1X0-
TMDS DECODER
62
10
R1XC+
59
12
R1XC-
58
14
HDCP
CIPHER DECRYPTOR
16
29 30 33
18
Q4071
5V
3.3V
DDC_SDA1
3.3V_SDA
SDA
5
D1
S1
DDC_SCL1
3.3V_SCL
7
WC
SCL
6
D2
S2
IC4022
EEPROM
CABLE IN;Hi/NORM
CABLE OUT;LOW/MUTE
Q4083
Q4068
MAIN 5V
HOTPLUG
Q4065
IC4027
MAIN 3.3V
MAIN 1.8V
HPD1
7
VIN
VOUT 1
HDMI_5V_DET1
5
CONT
AUDIO MUTE AND 5V DET
Hi;MUTE
Low;DETECT HPD5V
IC4025
AUDIO DAC
IC4026
HDMI I/F RECEIVER
RX_MCLK
MCLK
Clock
1
Divider
34
H:MUTE
MUTE_OUT
SMUTE
P
77
6
MUTE OUT
INTERFACE
PDN
5
MCLK
88
AOUTR
SCK
RX_SCK
BICK
8X
86
2
10
AUDIO
AUDIO
Interpolator
Modulator
SD0
RX_SD0
SDTI
INTERFACE
Data
84
3
INTERFACE
RX_WS
LRCK
AOUTL
WS
8X
85
4
11
Interpolator
Modulator
142
141
YBIN0-YBIN9
132
VIDEO
123
INTERFACE
136
133
(TO GC5 PORT-B)
UBIN0-UBIN9
119
110
MAIN 1.8V
MAIN 3.3V
CLKINB2
ODCK
121
HSIB
HSYNC
2
VSIB
3
VSYNC
AP_DE
DE
1
REFCH_HDMI
XTALIN
97
CSDA
27
SDA1
CSCL
28
SCL1
HDMI_CEC
AUDIO MUTE AND 5V DET
Hi;MUTE
Low;DETECT HPD5V
HDMI_5V_DET2
HPD2
22
1
2
3
MAIN1.8V
4
IC4028
MAIN9V
AUDIO AMP
6
R
7
5
2
L
1
3
TH-50PV60L
DG-Board (1 of 3) Block Diagram

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