Summary of Contents for National Instruments NI cRIO-905x Series
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USER MANUAL NI cRIO-905x Embedded CompactRIO Controller with Real-Time Processor and Reconfigurable FPGA This document describes the features of the cRIO-905x and contains information about mounting and operating the device. In this document, the NI cRIO-9053, NI cRIO-9054, NI cRIO-9056, NI cRIO-9057 are referred to collectively as cRIO-905x.
Contents Configuring the cRIO-905x...................... 2 Connecting the cRIO-905x to the Host Computer Using USB........3 Connecting the cRIO-905x to the Host Computer or Network Using Ethernet....4 Configuring Startup Options..................... 4 cRIO-905x Features........................6 Ports and Connectors......................6 Buttons..........................10 LEDs..........................11 Chassis Grounding Screw....................
Connecting the cRIO-905x to the Host Computer or Network Using Ethernet Complete the following steps to connect the cRIO-905x to a host computer or Ethernet network using the RJ-45 Gigabit Ethernet port 0. NI recommends using the RJ-45 Gigabit Ethernet port 0 for communication with deployed systems. Note If your controller has the RJ-45 Gigabit Ethernet port 1, you can configure that port in Measurement &...
cRIO-905x Features Ports and Connectors Figure 1. cRIO-905x Ports and Connectors 1. USB 2.0 Type-C Device Port with Console Out 4. Power Connector 2. USB 3.1 Type-C Host Port 5. SD Association MicroSD Card Removable Storage 3. PFI 0 6. RJ-45 Gigabit Ethernet Ports (one or two, depending on the model) USB 2.0 Type-C Device Port with Console Out When operating a device, use this port to connect the cRIO-905x to a host PC.
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The cRIO-905x has reverse-voltage protection. The following NI power supplies and accessories are available for use with the cRIO-905x. Table 5. Power Supplies Accessory Part Number NI PS-10 Desktop Power Supply, 24 V DC, 5 A, 100-120/200-240 V AC 782698-01 Input NI PS-14 Industrial Power Supply, 24 to 28 V DC, 3.3 A, 100-240 V AC 783167-01...
Buttons Figure 2. cRIO-905x Buttons 1. RESET Button 2. CMOS Reset Button RESET Button Press the RESET button to reset the processor in the same manner as cycling power. Figure 3. Reset Button Behavior Press and hold RESET button for < 5 s Press and hold RESET button for ≥...
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STATUS LED Indicators Table 11. STATUS LED Indicators LED Pattern Indication Blinks twice and The cRIO-905x is in safe mode. Software is not installed, which is the pauses factory default state, or software has been improperly installed on the cRIO-905x. An error can occur when an attempt to upgrade the software is interrupted.
Chassis Grounding Screw Figure 5. cRIO-905x Chassis Grounding Screw 1. Chassis Grounding Screw Note For information about grounding the cRIO-905x, see Grounding the Controller in the NI cRIO-905x Getting Started Guide. Note For more information about ground connections, visit ni.com/info and enter the Info Code emcground...
20 MHz and 100 kHz Timebases When programming C Series modules in Real-Time (NI-DAQmx) mode, the 20 MHz and 100 kHz timebases can be used to generate many of the analog input and analog output timing signals. These timebases can also function as the source input to the 32-bit general-purpose counter/timers.
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IEEE 802.1AS-2011 assumes all communication between devices is done on the OSI layer 2, while IEEE 1588-2008 can support various layer 2 and layer 3-4 communication methods. The IEEE 1588-2008 profile National Instruments implements on the cRIO-905x only supports layer 3-4 communication methods. Operating on the layer 2 yields better performance for the IEEE 802.1AS-2011.
IEEE 1588 External Switch Requirements To take advantage of the network synchronization features of the cRIO-905x controllers, ensure that your network infrastructure meets certain requirements depending on which IEEE 1588 profile is implemented for your application: • IEEE 802.1AS-2011 support—Automatically enables timebase synchronization and enables the use of time-based triggers and timestamping between devices across the network.
Vertical mounting orientation. Mounting substrate options: • Mount the cRIO-905x directly to a metallic surface that is at least 1.6 mm (0.062 in.) thick and extends a minimum of 101.6 mm (4 in.) beyond all edges of the device. • Use the NI Panel Mounting Kit to mount the cRIO-905x to a metallic surface that is at least 1.6 mm (0.062 in.) thick and extends a minimum of 101.6 mm (4 in.) beyond all edges of the device.
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Figure 11. cRIO-905x 4-slot Controller Front Dimensions 89.61 mm (3.528 in.) 221.40 mm (8.72 in.) Figure 12. cRIO-905x 8-slot Controller Front Dimensions 89.61 mm (3.528 in.) 328.64 mm (12.938 in.) 22 | ni.com | NI cRIO-905x User Manual...
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Figure 14. Front Mounting the 4-slot cRIO-905x Directly on a Flat Surface Figure 15. Front Mounting the 8-slot cRIO-905x Directly on a Flat Surface Prepare the surface for mounting the cRIO-905x using the Surface Mounting Dimensions. Align the cRIO-905x on the surface. Fasten the cRIO-905x to the surface using the M4 screws appropriate for the surface.
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Figure 18. Rear Mounting the 4-slot cRIO-905x Directly on a Flat Surface Figure 19. Rear Mounting the 8-slot cRIO-905x Directly on a Flat Surface 26 | ni.com | NI cRIO-905x User Manual...
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• NI panel mounting kit for 4-slot controllers, 157253-01 – Panel mounting plate – M4 x 10 screws (x4) • NI panel mounting kit for 8-slot controllers, 157267-01 – Panel mounting plate – M4 x 10 screws (x6) What to Do Complete the following steps to mount the cRIO-905x on a panel.
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Figure 27. Mounting the 8-slot cRIO-905x on a DIN Rail Align the DIN rail clip with the mounting holes on the rear of the cRIO-905x. Fasten the DIN rail clip to the cRIO-905x using the screwdriver and M4 x 10 screws. Note You must use the screws provided with the NI DIN rail kit because they are the correct depth and thread for the DIN rail clip.
Table 15. Supported Programming Modes for Popular Tasks Task Real-Time Real-Time Scan FPGA Control rates up to 1 kHz ■ ■ Control rates between 1 kHz and 2.5 kHz ■ ■ ■ (application dependent) Control rates over 2.5 kHz ■ High-speed waveform acquisition ■...
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Figure 36. Reference Trigger Final Buffer Reference Trigger Pretrigger Samples Posttrigger Samples Complete Buffer Using a Digital Source To use a reference trigger with a digital source, specify a source and a rising or falling edge. Either PFI or one of several internal signals on the cRIO controller can provide the source. Refer to the "Device Routing in MAX"...
available frequencies; by default, the fastest available is used. The sample rate of all modules in the task is an integer divisor of the frequency of the AI Sample Clock Timebase. When one or more delta-sigma modules are in an analog input task, the delta-sigma modules also provide the signal used as the AI Sample Clock.
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Use HWTSP mode if you need to know if a loop executes in a given amount of time, such as in a control application. Because there is no buffer, if you use HWTSP mode, ensure that reads or writes execute fast enough to keep up with hardware timing. If a read or write executes late, it returns a warning.
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AO Sample Clock Timebase Signal The AO Sample Clock Timebase signal is divided down to provide a source for AO Sample Clock. AO Sample Clock Timebase can be generated from external or internal sources, and is not available as an output from the controller. Delta-Sigma Modules The oversample clock is used as the AO Sample Clock Timebase.
Getting Started with AO Applications in Software You can use the cRIO controller in the following analog output applications: • Single-point (on-demand) generation • Hardware-Timed Single Point generation • Finite generation • Continuous generation • Waveform generation For more information about programming analog output applications and triggers in software, refer to NI-DAQmx Help or to the LabVIEW Help.
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Digital Input Timing Signals The cRIO controller features the following digital input timing signals: • DI Sample Clock Signal* • DI Sample Clock Timebase Signal • DI Start Trigger Signal* • DI Reference Trigger Signal* • DI Pause Trigger Signal* Signals with an * support digital filtering.
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Using a Digital Source To use DI Start Trigger with a digital source, specify a source and a rising or falling edge. Use the following signals as the source: • Any PFI terminal • Counter n Internal Output The source also can be one of several other internal signals on the cRIO controller. Refer to the "Device Routing in MAX"...
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Figure 42. Filter Example Digital Input P0.x Filter Clock Filtered Input Getting Started with DI Applications in Software You can use the cRIO controller in the following digital input applications: • Single-point acquisition • Hardware-Timed Single Point acquisition • Finite acquisition •...
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Buffered Digital Output A buffer is a temporary storage in computer memory for generated samples. In a buffered generation, data is moved from a host buffer to the cRIO controller onboard FIFO before it is written to the C Series module(s). One property of buffered I/O operations is sample mode.
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DO Start Trigger Signal Use the DO Start Trigger signal to initiate a waveform generation. If you do not use triggers, you can begin a generation with a software command. If you are using an internal sample clock, you can specify a delay from the start trigger to the first sample. For more information, refer to the NI-DAQmx Help.
is actively using the module, to avoid interfering with the other task, NI-DAQmx generates an error instead of sending the line configuration command. During the line configuration command, the output lines are maintained without glitching. PFI with NI-DAQmx You can configure channels of a parallel digital module as Programmable Function Interface (PFI) terminals.
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Counter Timing Engine Unlike analog input, analog output, digital input, and digital output, the cRIO controller counters do not have the ability to divide down a timebase to produce an internal counter sample clock. For sample clocked operations, an external signal must be provided to supply a clock source.
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Default Counter/Timer Routing Counter/timer signals are available to parallel digital I/O C Series modules. To determine the signal routing options for modules installed in your system, refer to the Device Routes tab in MAX. You can use these defaults or select other sources and destinations for the counter/timer signals in NI-DAQmx.
Counter Input Applications The following sections list the various counter input applications available on the cRIO controller: • Counting Edges • Pulse-Width Measurement • Pulse Measurement • Semi-Period Measurement • Frequency Measurement • Period Measurement • Position Measurement • Two-Signal Edge-Separation Measurement Counting Edges In edge counting applications, the counter counts edges on its Source after the counter is armed.
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Pulse-Width Measurement In pulse-width measurements, the counter measures the width of a pulse on its Gate input signal. You can configure the counter to measure the width of high pulses or low pulses on the Gate signal. You can route an internal or external periodic clock signal (with a known period) to the Source input of the counter.
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Pulse Measurement In pulse measurements, the counter measures the high and low time of a pulse on its Gate input signal after the counter is armed. A pulse is defined in terms of its high and low time, high and low ticks or frequency and duty cycle. This is similar to the pulse-width measurement, except that the inactive pulse is measured as well.
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You can route an internal or external periodic clock signal (with a known period) to the Source input of the counter. The counter counts the number of rising (or falling) edges occurring on the Source input between two edges of the Gate signal. You can calculate the semi-period of the Gate input by multiplying the period of the Source signal by the number of edges returned by the counter.
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High Frequency with Two Counters For high frequency measurements with two counters, you measure one pulse of a known width using your signal and derive the frequency of your signal from the result. Note Counter 0 is always paired with Counter 1. Counter 2 is always paired with Counter 3.
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Figure 64. Sample Clocked Buffered Frequency Measurement (Averaging) Counter Armed Gate (fx) Source (fk) Sample Clock T1 T2 T1 T2 T1 T2 Buffer 2 10 2 10 When CI.Freq.EnableAveraging is set to False, the frequency measurement returns the frequency of the pulse just before the sample clock. This single measurement is a single frequency measurement and is not an average between clocks as shown in the following figure.
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Which Method Is Best? This depends on the frequency to be measured, the rate at which you want to monitor the frequency and the accuracy you desire. Take for example, measuring a 50 kHz signal. Assuming that the measurement times for the sample clocked (with averaging) and two counter frequency measurements are configured the same, the following table summarizes the results.
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For information about connecting counter signals, refer to the Default Counter/Timer Routing section. Period Measurement In period measurements, the counter measures a period on its Gate input signal after the counter is armed. You can configure the counter to measure the period between two rising edges or two falling edges of the Gate input signal.
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reload phase becomes true. After the reload occurs, the counter continues to count as before. The figure below illustrates channel Z reload with X4 decoding. Figure 69. Channel Z Reload with X4 Decoding Ch A Ch B Ch Z Max Timebase Counter Value A = 0 B = 0...
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Figure 72. Single Two-Signal Edge-Separation Measurement Counter Armed Measured Interval GATE SOURCE Counter Value Latched Value Implicit Buffered Two-Signal Edge-Separation Measurement Implicit buffered and single two-signal edge-separation measurements are similar, but implicit buffered measurement measures multiple intervals. The counter counts the number of rising (or falling) edges on the Source input occurring between an active edge of the Gate signal and an active edge of the Aux signal.
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You can specify a pulse width. The pulse width is also measured in terms of a number of active edges of the Source input. You also can specify the active edge of the Source input (rising or falling). The following figure shows a generation of a pulse with a pulse delay of four and a pulse width of three (using the rising edge of Source).
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Table 22. Finite Implicit Buffered Pulse Train Generation Sample Idle Ticks Active Ticks Figure 81. Finite Implicit Buffered Pulse Train Generation SOURCE Counter Armed Continuous Buffered Implicit Pulse Train Generation This function generates a continuous train of pulses with variable idle and active times. Instead of generating a set number of data samples and stopping, a continuous generation continues until you stop the operation.
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Figure 83. Frequency Generator Block Diagram Frequency Output ÷ 20 MHz Timebase Timebase Frequency Generator FREQ OUT 100 kHz Timebase Divisor (1–16) The frequency generator generates the Frequency Output signal. The Frequency Output signal is the Frequency Output Timebase divided by a number you select from 1 to 16. The Frequency Output Timebase can be either the 20 MHz Timebase, the 20 MHz Timebase divided by 2, or the 100 kHz Timebase.
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• Counter n Internal Output and Counter n TC Signals • Frequency Output Signal In this section, n refers to the cRIO controller Counter 0, 1, 2, or 3. For example, Counter n Source refers to four signals—Counter 0 Source (the source input to Counter 0), Counter 1 Source (the source input to Counter 1), Counter 2 Source (the source input to Counter 2), or Counter 3 Source (the source input to Counter 3).
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• Analog Comparison Event • Change Detection Event In addition, a counter’s Internal Output, Gate or Source can be routed to a different counter’s Aux. A counter’s own gate can also be routed to its Aux input. Some of these options may not be available in some driver software. Refer to the "Device Routing in MAX"...
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