Circuit Description - Vertex Standard VX-6000U Service Manual

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Transceiver functions, such as PLL synthesizer
settings and channel programming, are controlled
via the microprocessor unit (MPU). Reception and
transmission are switched by "RX" and "TX" lines,
also controlled from the MPU.
Main Receiver Signal Path
The receiver uses double-conversion superhetero-
dyne circuitry, with a 43.95 MHz 1st IF and 450 kHz
2nd IF. The 1st LO, produced by a PLL synthesizer,
yields the 43.95 MHz 1st IF. The 2nd LO uses a 43.5
MHz (43.95 MHz - 450 kHz) signal generated by a
crystal oscillator. The 2nd mixer and other circuits
use a custom IC to convert and amplify the 2nd IF,
and detect FM to obtain demodulated signals.
Incoming RF signals from the antenna connector
are delivered to the PA Unit, and pass through a low-
pass filter (LPF) network consisting of coils L6003,
L6004, and L6005, capacitors C6023, C6024, and
C6025, and antenna switching relay RL6001 for de-
livery to the receiver front end in the MAIN Unit.
Signals within the frequency range of the trans-
ceiver are then passed through a varactor-tuned
band-pass filter consisting of L1006/L1009 before RF
amplification by Q1018 (2SC3356).
The amplified RF is then band-pass filtered again
by varactor-tuned resonators L1016/L1020 before
further RF amplification by Q1034 (2SC4227). The
amplified RF is then delivered to the 1st mixer D1023
(GN2011).
Buffered output from the VCO Unit is amplified
by Q1031 (2SC4227) and low-pass filtered by L1030/
L1004 and C1214/C1215/C1217 to provide a pure 1st
local signal between 406.05 and 436.05 MHz for in-
put to the 1st mixer.
The 43.95MHz 1st mixer product then passes
through dual monolithic crystal filters XF1001 and
XF1002 (±7.5 kHz BW) for wide band or XF1003 and
XF1004 (±3.75 kHz BW) for narrow band, and is am-
plified by Q1041 (2SC4227) and delivered to the in-
put of the FM IF subsystem IC Q1036 (TA31136FN).
This IC contains the 2nd mixer, 2nd local oscillator,
limiter amplifier, FM detector, noise amplifier, and
squelch gate.
The 2nd LO in the IF-IC is produced from crystal
X1001 (14.500MHz), and the 1st IF is converted to
450 kHz by the 2nd mixer and stripped of unwanted
components by ceramic filter CF1001 or CF1002. Af-
ter passing through a limiter amplifier, the signal is
demodulated by the FM detector.
Demodulated receive audio from the IF-IC is
amplified by Q2018 (CXA1846N). After volume ad-
justment by the AF power amplifier Q2019
(TDA7240AV), the audio signal is passed to the
speaker jack or the internal 4-Ohm loudspeaker.
VX-6000 UHF Service Manual

Circuit Description

PLL Synthesizer
The 1st LO, a PLL synthesizer, maintains stabili-
ty using a 14.500 MHz reference signal from TCXO
X1001. PLL synthesizer IC Q1033 (SA7025DK) con-
sists of a prescaler, reference counter, swallow
counter, programmable counter, a serial data input
port to set these counters based on the external data,
a phase comparator, and charge pump. The PLL-IC
divides the 14.500 MHz reference signal by 725 us-
ing the reference counter (20.0 kHz comparison fre-
quency). The phase detector comparison frequency
is designed to be eight times the channel spacing (2.5
kHz). The VCO output is divided by the prescaler,
swallow counter and programmable counter. These
two signals are compared by the phase comparator
and sent to the charge pump. A voltage proportion-
al to their phase difference is delivered to the low-
pass filter circuit, then fed back to the VCO as a volt-
age with phase error, controlling and stabilizing the
oscillating frequency. This synthesizer also operates
as a modulator during transmit.
The RX-VCO is composed of Q1015 (2SK508) and
D1008/D1009 (1SV282X2), and oscillates be-tween
406.050 MHz and 436.050 MHz according to the pro-
grammed receiving frequency. And the TX-VCO is
comprised of Q1019 (2SC4226) and D1013, D1015
(1SV276X2), D1014 (1SV229), and oscillates between
450.000MHz and 480.000MHz according to the pro-
grammed transmit frequency. The VCO output pass-
es through buffer amplifier Q1025 (2SC5107), and a
portion is fed to the buffer amplifier Q1026
(2SC5107) of the PLL IC, and at the same time am-
plified by Q1031 (2SC4227) to obtain stable output.
The VCO DC supply is regulated by Q1008
(2SC4154E). Synthesizer output is fed to the 1st mix-
er by diode switch D1022 (1SS321) during receive,
and to Tx drive amplifier Q1035 (2SC5107) for trans-
mit.
8-1

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