48
XVSS
1
VSUBC
2
VSSR
3
OUTR2(–)
4
VDDR
5
PWM
6
OUTR1(+)
VSSR
7
VSSL
8
9
OUTL2(–)
10
VDDL
OUTL1(+)
11
VSSL
12
1
2
Y0
Y2
IC3030 CXD9788AR (MAIN Board (9/10))
IC3010 CXD9788AR (MAIN Board (10/10))
IC3020 CXD9788AR (MAIN Board (10/10)) (FZ900M)
47
46
45
44
43
42
41
40
CLOCK
GENERATOR
(SECONDARY)
LINER
Δ Σ
INTERPOLATOR
13
14
15
16
17
IC4004 MC14052BDR2 (IO-COMPONENT Board)
IC4005 MC14052BDR2 (IO-COMPONENT Board)
IC4007 MC14052BDR2 (IO-COMPONENT Board)
VDD
X2
X1
X
16
15
14
13
3
4
5
Y
Y3
Y1
39
38
37
FILTER &
GAIN
LOW CUT
CONTROL
FILTER
INIT/
SERIAL
MUTE
CONTROLLER
18
19
20
21
22
23
X0
X3
12
11
BINARY TO 1 OF 4
DECODER WITH INHIBIT
HCD-FZ900KW/FZ900M
CLOCK
GENERATOR
(PRIMARY)
SAMPLING
RATE
S
P
CONVERTER
24
A
B
10
9
LEVEL
CONVERTER
6
7
8
INH
VEE
VSS
36 XFSIIN
35 DVDD
34 TEST
33 BFVSS
32 BFVDD
31
DATA(DATA3)
30
BCK
29
LRCK
28 MCKSEL
27 INIT
26 SFLAG
25 OVF FLAGL
67