JVC KS-FX945R Service Manual page 29

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QQ
3 7 63 1515 0
6.7
LC75873NW (IC601):LCD Driver
• Pin layout
• Block diagram
• Pin function
TE
L 13942296513
Pin No.
Pin name
79,80
S1/P1 to S4/P4
1,2,3
S5 to S68
to 66
67
COM1
78
COM2
69
COM3
74
OSC
76
CE
77
CL
78
DI
75
INH
71
VDD1
www
72
VDD2
.
70
VDD
73
VSS
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60
41
61
40
80
21
1
20
VDD1
COMON
DRIVER
VDD2
INH
CLOCK
OSC
GENERATOR
VDD
VSS
I/O
O Segment outouts for displaying the display data transferred by serial data input.
The S1/P1 to S4/P4 pins can be used as generalpurpose output ports under serial data control.
O Common driver outputs.
The frame frequency f0 is given by :
f0 = (FOSC/384)Hz.
I/O Oscillator connection
An oscillator circuit is formed by connecting an external resistor and capacitor to this pin.
I
Serial data transfer inputs.
I
Connected to the controller.
I
CE:Chip enable
CL:Synchronization clock
DI:Transfer data
I Display off control input
• INH= "L"(VSS) ---Display forced off
S1/P1 to S4/P4 = "L"
(These pins are forcibly set to the segment output port function and held at the low level.)
S5 to S68 = "L"
COM1 to COM3"L"
• INH = "H"(HDD)---Display on
However, serial data transfer is possible when the display is forced off by this pin.
I Used for applying the LCD drive 2/3 bias voltage externally. Must be connected to VDD2 when a 1/2
bias drive scheme is used.
x
I Used for applying the LCD drive 1/3 bias voltage externally. Must be connected to VDD1 when a 1/2
ao
y
bias drive scheme is used.
i
- Power supply connection. Provide a voltage of between 3.0 and 6.0V.
- Power supply connection. Connect to ground.
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8
SEGMENT DRIVER
SHIFT REGISTOR
ADDRESS
DETECTOR
Q Q
3
6 7
1 3
Description
u163
.
2 9
9 4
2 8
1 5
0 5
8
2 9
9 4
m
co
9 9
2 8
9 9
(No.49875)1-29

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