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SERVO BOARD
IC5: MCU TMP92FD28A
PC2/INT2/TB1IN0/TB0IN0
(PN1)SDA0/TA3OUT
(PN2)SCL0/TA2IN/SI0
(PN3)HSCLK/SCK1
(PN4)SDA1/HSSO/SO1
(PN5)SCL1/HSSI/SI1
(PF2)SCLK0/
(PF3)TXD1/SPDO
(PF4)RXD1/SPDI
(PF5)SCLK1/
(PC2)INT2/TB1IN0/TB0IN0
1
RESET
PC0/INT0
PC1/INT1
PC3/INT3
5
DVCC3B
XT1
XT2
PWE
10
DVSS
DVCC1B
RVOUT1
RVIN
RVIN
RVOUT2
15
DVCC1A
DVSS
P00/D0
P01/D1
P02/D2
20
P03/D3
P04/D4
P05/D5
P06/D6
25
P07/D7
DVCC3A[5]
DVCC3B[1]
DVSS[8]
(PG0)KI0
(PG1)KI1
Key-on
PortG
(PG2)KI2
Wake up
(PG3)KI3
Serial Bus I/F
(Ch.0)
Serial Bus I/F
PortN
(Ch.1)
HSIO
(PF0)TXD0
Serial I/O
(PF1)RXD0
(Ch.0)
/CLK
CTS
0
/TB0OUT0
Serial I/O
PortF
(Ch.1)
SPIC
/SPCLK
CTS
1
PortC
(PC0)INT0
(PC1)INT1
(PC3)INT3
PMC
PWE
TMP92FD28AFG
LQFP100
TOPVIEW
TLCS-900/H1 CPU
XWA
W
A
C
B
XBC
E
D
XDE
L
H
XHL
IX
XIX
IY
XIY
IZ
XIZ
SP
XSP
32bit
F
SR
P C
Watchdog
Timer
Real Time
Clock
32-KB RAM
512-KB ROM
Program
patch logic
8-Banks
Host Controller
Interrupt
Memory
Controller
Controller
(4-Blocks)
16-BitTimer
8-Bit Timer(TMRA0)
(TMRB0)
8-Bit Timer(TMRA1)
16-Bit Timer
8-Bit Timer(TMRA2)
(TMRB1)
8-Bit Timer(TMRA3)
8-Bit Timer(TMRA4)
8-Bit Timer(TMRA5)
- 30 -
75
X1
DVSS
X2
AM1
P83/CS3/WAIT/TA5OUT
70
P82/CS2
P80/CS0/TA1OUT/BOOT
P74/TA0IN
P73/SRLUB
P72/SRLLB
65
P71/SRWR
P70/RD
DVCC3A
DVSS
P67/A23
60
P66/A22
P65/A21
P64/A20
P63/A19
P62/A18
55
P61/A17
P60/A16
P57/A15
P56/A14
P55/A13
DVCC1A[1]
*
DVCC1B[1]
*
RVIN [2]
RVOUT[2]
*
RESET
Mode
AM0
Controller
AM1
PLL
X1
H-OSC
X2
Clock Gear
XT2
L-OSC
XT1
Port0
D0 to D7(P00 to P07)
Port1
D8 to D15(P10 to P17)
Port4
A0 to A7(P40 to P47)
Port5
A8 to A15(P50 to P57)
Port6
A16 to A23(P60 to P67)
D+
USB
D-
X1USB(P77)
USBPON(P76)
USBOC
(P75)
Port7
TA0IN/(P74)
SRLUB
(P73)
SRLLB
(P72)
SRWR
(P71)
RD
(P70)
/TA1OUT(P80)
CS
0
(P82)
CS
2
Port8
CS / WAIT /TA5OUT(P83)
3
( ): Initial function after reset
: * NC pins (Only use Mask ROM Version)
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