Sony ICD-U50 Service Manual page 18

ICD-U50/U60/U70
Ver. 1.1
• IC Block Diagrams
– MAIN Board –
IC501 TPS61020DRCR
10
Anti-
Ringing
VOUT
EN 1
Vmax Gate
Control Control
VOUT 2
Regulator
FB 3
Control Logic
LBO 4
GND 5
Low Battery
Comparator
Vref=0.5V
GND
IC703 RTC8564NB
32.768kkHz
INT 1
CRYSTAL
OSC
GND1 2
GND2 3
OUTPUT
NC1 4
CONTROL
SDA 5
SCL 6
CLKOUT 7
I 2
C-BUS
VDD
8
INTERFACE
CLKOE
9
POR
NC2 10
NC3 11
ICD-U50/U60/U70
Backgate
Control
10kΩ
10 PGND
20pF
PGND
PGND
9 SW
Error
Amplifier
8 PS
Vref=0.5V
GND
Oscillaor
Temperature
Control
LBI
7
6 VBAT
20 NC12
Control 1 00
Voltage Detector Control 2
19 NC11
Seconds
Minutes
18 NC10
Hours
17
DIVIDER Days NC9
Weekdays
16 NC8
Month/Century
Years
15
NC7
Minutes Alarm
CONTROL
LOGIC
Hour Alarm
14 NC6
Day Alarm
13 NC5
Weekend Alarm
CLKOUT frequency
12 NC4
ADDRESS
Timer Control
REGISTER
Timer 0F
• IC Pin Function Description
MAIN BOARD IC701 DE53SN589AM8BLC (SYSTEM CONTROLLER)
Pin No. Pin Name
1 SPOUTP
2 BCLK
3 TXMOD
4 RSSI
5 XIN
6 XOUT
7 VDD
8 VCCIN
9 GND1
10 USBP
11 USBM
12 VCC1
13 DCDCGND
14 DCDCIN
15 DCDCOUT
16 RSTN
17 BGPIO0
18 BGPIO3
19 BGPIO4
20 BGPIO5
21 BGPIO6
22 EGPIO14
23 BGPIO1
24 BGPIO2
25 BGPIO11
26 BGPIO12
27 BGPIO13
28 BGPIO15
29 CGPIO3
30 GND2
31 VCC2
32 EGPIO12
33 EGPIO13
34 EGPIO11
35 BGPIO7
36 BGPIO8
37 BGPIO9
38 BGPIO10
39 DGPIO10
40 DGPIO9
41 DGPIO8
42 DGPIO7
43 DGPIO6
44 DGPIO5
45 DGPIO4
46 DGPIO3
47 DGPIO2
18 18
I/O Description
O Speaker output
O Not used (open)
O Not used (open)
I Not used (connected to ground)
I Clock input terminal (4.096MHz)
O Clock output terminal (4.096MHz)
— DSP core power supply output terminal
— DSP core power supply terminal
— Ground terminal for digital circuit
I/O USB data signal (+)
I/O USB data signal (–)
— Power supply terminal for digital circuit
— LCD backlight LED drive ground
I LCD backlight LED drive power supply terminal
O LCD backlight LED drive (Pull up)
I/O External reset signal input and output
O Chip enable signal output for NAND Flash Memory pull-up terminal
O Address latch enable signal output for NAND Flash Memory
O Command latch enable signal output for NAND Flash Memory
O Not used
O Chip enable signal output for NAND Flash Memory (Not used)
I Test mode start signal input (for factory use)
O [PLAY] LED drive control signal output
O [REC] LED drive control signal output
I/O Not used (open)
O Not used (open)
O Headphones mute control signal output
O Not used (open)
I USB connection detect signal input
— Ground terminal for digital circuit
— Power supply terminal for digital circuit
O LCD controller chip select signal output
O LCD controller serial clock signal output
O LCD controller serial data signal output
O LCD controller address signal output
O External speaker mute control signal output (not used)
O External speaker shutdown control signal output (not used)
I NAND Flash Memory Ready/Busy signal input
I/O NAND Flash Memory CS1/CS2 select signal input (not used)
O USB connection detect signal input
I RTC interrupt input
I/O NAND Flash Memory data bus
I/O NAND Flash Memory data bus
I/O NAND Flash Memory data bus
I/O NAND Flash Memory data bus
I/O NAND Flash Memory data bus
I/O NAND Flash Memory data bus