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A
B
8
FROM/TO SYSCON1
W833
D
GND
GND[A]
AT+D5V
SPDIF
CPU_RESET
VCC+9V
SYS_MUTE
SCL
7
SDA
CD/DVD
AT+3.3V
DAC_A
FROM MPEG
SPDIF-DVD
AMCLK
ABCLK
6
ALRCLK
ASDATA0
DAC_D
CS
DAC_A
DAC_B
DAC_C
DAC_D
G_DAC
DAC_C
FROM DSP
5
SPDIF-CD
DAC_B
4
3
B8502
FCM2012H-102T04
AUDIO_L
AUDIO_R
2
1
A
B
G-13
C
AUDIO/VIDEO SCHEMATIC DIAGRAM
L8502
1.8uH
1.2
C8508
0.6
BUFFER
Q8502
22P CH
KTA1504S_Y_RTK
0
L8503
C8518
1.2
1.8uH
1
C8509
0.6
22P CH
BUFFER
0
Q8503
KTA1504S_Y_RTK
L8504
W841
1.8uH
1.2
C8510
BUFFER
Q8504
0.6
22P CH
KTA1504S_Y_RTK
0
B8501
FCM2012H-102T04
C8529
W821
2.2 F
2.6
2.6
5.2
3.2
0
3.1
3.1
3.1
8
7
6
5
4
3
2
1
C8530
W822
2.2 F
9
10
11
12
13
14
15
16
0
2.6
2.9
3.0
3.0
3.0
2.9
3.1
NC
NOTE:THE DC VOLTAGE EACH PART WAS
MEASURED WITH THE DIGITAL TESTER
DURING PLAYBACK.
C
D
E
(DVD PCB)
W802
L8505
15uH 0305
W830
R8515
75 +-1%
W840
B
C8520
0.1
F
W803
W804
C8535
0.1 F
R8520
NC
3.2
0
0
0
0
0
0
0
1K
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
1.6
0
1.6
0
0
0
0
0
NOTE: THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
D
E
F
G
VCC+9V
9.4
9.2 8.5
3
2
1
REG.
Q8506
HN1C03F_B
4
5
6
8.5
9.2
9.4
R8516 680
DAC/D[CVBS]
CVBS
DAC/C[C]
C(CVBS)
DAC/B[Y1]
Y(G)
D8504
D8505
D8506
1SS226
1SS226
1SS226
2
2
2
1
3
1
3
1
3
DAC/B[Y1]
DAC/C[C]
DAC/D[CVBS]
AUDIO_L
AUDIO_R
ZERO
CPU_RESET
W811
SYS_MUTE
F
G
H
8
7
6
5
4
FROM/TO REGULATOR
CP8502
(CP8002)
IMSA-9604S-18Z14
FFC(1.25P)
Y(G)
18
CD8002
GND
17
2H0I0102
3
C(CVBS)
16
GND
15
CVBS
14
GND
13
NC
12
GND
11
NC
10
GND
9
NC
8
GND
7
AUDIO-L
6
GND
5
AUDIO-R
4
2
ZERO
3
DVD_RESET
2
SYS_MUTE
1
PCB130
VMB261
1
H
G-14
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