Yamaha RX-V3800 Service Manual page 44

A B C
RX-V3800/DSP-AX3800
A-VIDEO 2/2
1
Page 130 E4
to OPERATION (3)_CB807
REC/ZONE SELECTOR
2
JK201
3
0.1
0.1
4.9
0.1
0.1
4
4.5
4.9
9.0
4.9
JK202
IC218
0
3.5
3.0
0 IC218
3.5
IC218
5 0
3.5
0.1
IC218
3.5
3.0
-0.9
IC218
3.5
0.1
IC218
6
3.5
JK203
0
3.5
3.0
0
3.5
4.9
0
7
3.5
8
9
# All voltages are measured with a 10MΩ/V DC electronic voltmeter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
10
134
D E F
INPUT SELECTOR
0 4.9
0.1 0
0 0
0.1 -4.9
0 0
4.9 0
0 0
0 0
0 0
0
0
0 4.9
0 0
-4.9 0.1
0 0
0 0.1
4.9 0
0
0 4.9
0.1 0
0 0
0.1 -4.9
0.1 0
4.9 0
0 0
0
0
0 0
0 0
SOURCE/REC 0 4.9
0
0.3 0.1
-4.9
0 0
SELECTOR 0 0.1
4.9 0
0
0 0
0 -4.9 0 9.0
0.1 0
0 0 0 0
0.1 -4.9
-0.4 0.1 0.4 -0.4
9.0 0
-0.4 0 0 0
0 0.2 -0.4
0 0.2 0
0 0 0
0 0 9.0
-0.4 -0.4
4.9 0 -4.9 0.1
0.4 0.2
0 0.1
9.0 0.1
4.9
0
4.9
0 0
0
IC220
0
-4.8
0
-4.8
0
4.9
-0.4 0 0
0 IC220
0 0
0
-4.6
0
0
-4.8 -4.8
4.9
-0.4 -1.1
4.9
0
4.9
0
-4.9
0
-4.9
-0.4
0
0
IC227
0
0
IC219
0
0
4.9
0
IC219
0 0 0.2
0 0
0
0 0
0 0
IC219 0
0 4.9
-4.9 4.9
0 4.9
IC223: TC74VHCU04FT
Hex inverters
POINT A-2 Pin 3 of IC224
1A 1
1Y 2
2A 3
2Y 4
3A 5
3Y 6
GND 7
G H
4.9
0
0 0
0 0
4.9 0
3.5 0
3.5 0
0.1 4.9
0.1 4.9
4.9 4.9
0.1 4.9
0.1 0
4.9
9.0
4.9
4.9
0.1
0.1
SIGNAL DETECT
5.0 IC223
4.9
0.1 2.5 2.5 2.5
0.1
2.5 2.5 2.5
0
4.9
0 0
0 0 0 5.0
0
0
0 0
4.9
4.3
0.9 0.5
0.9
4.3
-0.6
-0.6
-1.1 0.2
-0.6
-0.4
-1.8 -0.4 -0.6
0
0.9
0.9
OSD IC
A-2
0.7
0 4.9
2.3 4.9
2.4
4.9
0 0
4.9
0
2.4
2.4
0
4.9 4.9
0.1 0.7
0
0.1
4.9
1.6
4.9
1.6
4.9
1.0
0
-0.2
0
0.1
IC226
0
0.7
0 0.7 3.0
0 IC226
4.9 0.7 0.2
0 0 0.7 0.1
-4.9 IC226
0
0.7
-4.9 0.3
-4.2
IC217, 221: MM74HC4053SJX
IC222: LC709004A-TLM-E
Triple 2-channel analog multiplexer
I/O-expander for microcontroller
14 VCC
Serial/parallel converter/shift register DOUT
13 6A DIN 2 14
A 11 Conversion
12 6Y CLK# 3 15 VDD
19 VSS
CS# 4
11 5A 10
B
Conversion
10 5Y
RES# 21 I/O control/output register 9
C
9 4A Conversion
6
8 4Y INH
Conversion
port 0 I/O buffer port 1 I/O buffer
8
GND
24 17 15 8
I J K
CB203
Page 126 I9
to FUNCTION (1)_CB410
W2001
Page 132 H5
to POWER (3)_CB23
CB204
Page 139 L4
to D-VIDEO_CB185
to A-VIDEO 1/2
to A-VIDEO 1/2
CB209
Page 129 B9
to FUNCTION (2)_W3500
IC224: LC74782JM-8A16-TLM
The on-screen display controller LSI
9
Serial 8-bits
latch
11 parallel +
converter command
decoder Horizontal
10
character
size
register
23 Horizontal
size
counter
24
IN/OUT 1
VCC CY CX BY BX AY AX
16 3 5 1 2 13 12
12
8
Logic Binary to
TG
Level 1 of 2
OUT/IN
Decoders 14
AX or AY
with
TG
INHIBIT Horizontal
Logic character
Level TG
Binary to OUT/IN size
15
1 of 2 Horizontal
BX or BY 6 register
Decoders TG
character
Logic with
size
Level INHIBIT
TG 7
OUT/IN register
Binary to 4
CX or CY
TG
1 of 2
Logic
Decoders
Level
with 17 Horizontal
Horizontal
INHIBIT
character character
18
size size
register register
7 19
VEE
20
22
L M N
IC218: LA73050-TLM-E
IC219, 226: LA7106M-TLM-E
Analog dual operational amplifier
Analog dual operational amplifier
N.C. 1 36 N.C.
VIN1+ 1 16 +VCC
N.C. 2 35 N.C.
NFB1 2 6dB DR 15 VOUT1
VIN1 3 +VCC1
34 MUTE1 3 GND
14
+Vcc
DCCNT1 4 6dB DR 33 VOUT1
VIN2+ 4 13 VOUT2
6dB DR
GND 5 32 GND
NFB2 5 12 DR CTL
6
VIN2 31 VOUT2 6
-VCC1 11 VOUT3
6dB DR
MUTE1 7 30 N.C.
VIN3+ 7 6dB DR 10 MUTE2
VIN3 8 29 VOUT3
6dB DR NFB3 8 9 -VCC2
N.C. 9 28 -VCC1
N.C. 10 27 -VCC2
N.C. 11 26 N.C.
VIN4 12 25 +VCC2
+Vcc
DCCNT2 13 6dB DR 24 VOUT4
14
GND 23 GND
VIN5 15 22 VOUT5
6dB DR
MUTE2 16 21 N.C.
VIN6 17 20 VOUT6
6dB DR
-VCC4 18 19 -VCC3
IC211-214: MM74HC4051SJX
8-channel analog multiplexer
CHANNEL IN/OUT
VCC Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
16 4 2 5 1 12 15 14 13
TG
TG
11
A
TG
Binary TG
B 10 COMMON
to 3
OUT/IN
Logic 1 of 8
TG
Level Decoder
Conversion with
TG
C 9 INHIBIT
TG
INH 6 TG
8 7
GND VEE
IC220: TK15420M
Video amplifier
OUT A 1 8 VCC
–IN A 2 7 OUT B
+ – + –
+IN A –IN B
3 6
VEE 4 5 +IN B
IC215, 216: CD4051BNSR
Single 8-channel multiplexer
CHANNEL IN/OUT
V DD
7 6 5 4 3 2 1 0
16 4 2 5 1 12 15 14 13
TG
TG
A †
11
TG
TG
B † 10 BINARY COMMON
TO 3
LOGIC OUT/IN
1 OF 8
LEVEL TG
DECODER
CONVERSION
WITH
C † 9
INHIBIT TG
TG
INH † 6
TG
CD4051B
†
All inputs are protected by standard CMOS protection network.
8 7
V SS V EE
Vertical Horizontal Vertical 31 inking Display RAM write
character display display 3nd inversion control address
size position position control
register counter
register register register register
Vertical 31 inking
Horizontal Vertical 3nd inversion
size Display RAM
dot counter
counter dot counter control
register
31 inking 31 inking
3nd inversion 3nd inversion
control control
register register
Character Line Decoder
control control
counter counter
1 24 VDD1
VSS1
Xtal IN 2 23 RST
Font RAM
Xtal 3 22 CTRL3
OUT
CTAL1 4 21 CTRL2
BLANK 5 20 SEP
IN
Character output Shift
Synchronization
Timing generator control
register OSCIN 6 19 SEP OUT
signal generator
Background control
OSC OUT 7 18 SEPC
Video output control
CHARA 8 17 SYN
IN
CS 9 16 VDD1
10 15
SCLK CV IN
SIN 11 14 NC
VDD2 12 13 CV
OUT
21 4 2 3 5 15 13