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D24
AK4321 (XS388A00) DAC
PIN
NAME
I/O
NO.
1
CKS
I
Clock selection
2
DVDD
-
Digital power supply
3
DVSS
-
Digital ground
4
XTO
O
Clock output
5
XTI
I
Clock input
6
/PD
I
Power down reset
7
BICK
I
Serial bit clock
8
SDATA
I
Serial data
9
LRCK
I
L/R clock
10
SMUTE
I
Soft mute
11
DFS
I
Sampling mode selection
12
DEM0
I
De-emphasis selection
CRVP08 (XV740A00) Gate Array
PIN
NAME
I/O
NO.
1
VDD
-
Power supply
2
VSS
-
Ground
3
XSCS
I
Chip select
4
XSWR
I
Light
5
XSRD
I
Read
6
SA0
I
7
SA1
I
Address bus
8
SA2
I
9
SA3
I
10
SD0
I/O
11
SD1
I/O
12
SD2
I/O
13
SD3
I/O
Data bus
14
SD4
I/O
15
SD5
I/O
16
SD6
I/O
17
SD7
I/O
18
VSS
-
Ground
19
VDD
-
Power supply
20
FS512
O
Fs x 512 Bit clock output
21
FS256
O
Fs x 256 Bit clock output
22
FS128
O
Fs x 128 Bit clock output
23
VSS
Ground
24
FS64
O
Fs x 64 Bit clock output
25
XFS64
O
Receives Fs64 clock
26
FS
O
Sampling frequency display (Audio)
27
VSS
-
Ground
28
XSSYNC
O
Sync signal for DSP
29
D8FS
O
One eighth clock (FS)
30
D16FS
O
One sixteenth clock (FS)
31
VCOBI
I
Input clock (PLLB)
32
VCOBO
O
Output clock (PLLB)
27
FUNCTION
FUNCTION
PIN
NAME
I/O
NO.
13
DEM1
I
De-emphasis selection
14
DIF0
I
Input format selection
15
DIF1
I
Input format selection
16
BVDD
-
Board Power
17
AOUTR
O
Analog R output
18
AOUTL
O
Analog L output
19
VCOM
O
Common voltage 1/2 AVDD
20
AVDD
-
Analog power supply
21
AVSS
-
Analog ground
22
VREF
I
Reference voltage
23
DZF
O
Zero input Detection
24
TTL
I
I/F level selection
PIN
NAME
I/O
NO.
33
VDD
-
Power supply
34
VSS
-
Ground
35
PDOUTNB
O
PLLB phase comparison output (-)
36
PDOUTPB
O
PLLB phase comparison output (+)
37
XPDOB
O
PLLB out of phase
38
XTALAI
I
XTALA input
39
XTALAO
O
XTALA output
40
SDINA
I
Serial data (OVR 1-4)
41
SDINB
I
Serial data (OVR 5-8)
42
XTALBI
I
XTALCB input
43
XTALBO
O
XTALCB input
44
UNLINB
I
UNLOCKB signal input
45
UNLOCKB
O
UNLOCKB signal output
46
XTALCI
I
XTALC input
47
XTALCO
O
XTALC output
48
UNLINA
I
UNLOCKA signal input
49
UNLOCKA
O
UNLOCKA signal output
50
VSS
-
Ground
51
VDD
-
Power supply
52
RCKINA
I
External clock input A
53
RCKINB
I
External clock input B
54
VCOAI
I
Input clock (PLLA)
55
VCOAO
O
Output clock (PLLA)
56
PDOUTNA
O
PLLB phase comparison output (-)
57
PDOUTPA
O
PLLB phase comparison output (+)
58
XPDOA
O
PLLA out of phase
59
XRST
I
Reset signal
60
XTCL
I
Reset signal (TEST)
61
TEST0
O
62
TEST1
O
Test signal output
63
TEST2
O
64
TEST3
O
MAIN: IC401
FUNCTION
MAIN: IC119
FUNCTION
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