Spi Mode - SanDisk INAND Product Manual

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Revision 3.1

Table 1-1

Mode

Single Block

Multiple Block

1.11

SPI Mode

The SPI Mode is a secondary communication protocol for iNAND devices. This mode is a

subset of the SD Protocol, designed to communicate with an SPI channel, commonly found

in Motorola and other vendors' microcontrollers. Table 1-1 contains names and

descriptions of SPI Mode functions. More information about SPI Mode can be found in

Section 7 or the SDA Physical Layer Specification, Version 2.00.

Mode Definitions

In this mode the host reads or writes one data block in a pre-specified length. The

data block transmission is protected with 16-bit CRC that is generated by the

sending unit and checked by the receiving unit.

The block length for read operations is limited by the device sector size (512 bytes)

but can be as small as a single byte. Misalignment is not allowed. Every data block

must be contained in a single physical sector.

The block length for write operations must be identical to the sector size and the

start address aligned to a sector boundary.

This mode is similar to the single block mode, except for the host can read/write

multiple data blocks (all have the same length) that are stored or retrieved from

contiguous memory addresses starting at the address specified in the command.

The operation is terminated with a stop transmission command.

Misalignment and block length restrictions apply to multiple blocks and are identical

to the single block read/write operations.

1-6

Chapter 1 – Introduction

SanDisk iNAND Product Manual

Description

12/07/06

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