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KDC-C715/Y
MICROCOMPUTER'S TERMINAL DESCRIPTION
Pin No
Name
41
DATAC
42
HCLK
43
REQC
44
CHMUTE
45
TSO
46
TSI
47
TSCK
48Å`55 A0Å`7
56Å`63 D0Å`7
64Å`68 A8Å`12
69Å`71 A13Å`15
72
VSS
73,74 A16,17
75
RAMOK
76
ELVADJ
77
RD
78
WR
79
WAIT
80
ASTB
81
VDD
82
RAMTEST
83
REQH
84
SP/LO+
85
SP/LO-
86
ELV+
87
ELV-
88
SIM1
89
SEARCH
90,91 TEST1,2
92
8V/7V
93
SLG
94
TEST/VPP
95
SRVSEL
96
SLNSA
97
SDA
98
SCL
99
PON
100
ARMSW
4
I/O
O
Data output to H/U.
I/O
H:Clock input. L:Clock output.
O
Communication request to H/U.
O
L:Muting ON.
O
Text data output.
I
Text data input.
O
Text clock output.
O
S-RAM address setting.
I/O
S-RAM data input/output.
O
S-RAM address setting.
O
S-RAM enable control.
GND.
O
S-RAM enable control.
O
H:OK.
I
L:Adjustment mode.
O
S-RAM read control.
O
S-RAM write control.
I
Wait during S-RAM access.
O
NC.
Power supply connection.
I
H:S-RAM check mode.
I
Communication request from H/U.
O
Spindle/Loading+ control.
O
Spindle/Loading- control.
O
Mechanism UP/DOWN control.
O
Mechamism UP/DOWN control.
I
L:Text. H:No text.
O
H:Play. L:Search.
I
L:Normal. H:Test.
O
H:7V. L:8V(Servo power supply).
I
H:+3dB. L:0dB(Sled gain).
I
L:Flash ROM program mode OFF.
I
H:Servo mode.
I
L:Sled non-sensible area ON.
I/O
EEPROM data input/output.
O
EEPROM clock output.
O
L:Power ON.
I
H:Arm switch ON.
Processing, Operation
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