Yamaha CLP-340 Service Manual page 32

CLP-340/CLP-340M/CLP-340C
T6TJ3XBG-0001 ( X8940A00 ) SWP51L ( Tone Generator )
PIN
OUTER
NAME I/O
NO.
NO.
VSS
1 A1 -
2 A2 VSS -
3 A3 HRD2 I/O
HRD0 I/O
4 A4
5 A5 HRD9 I/O
6 A6 HRD11 I/O
A7 HRD13 I/O
7
8 A8 HRD15 I/O
9 A9 RA1 O
10 A10 RA3 O
11 A11 RA5 O
12 A12 RA7 O
13 A13 RA9 O
14 A14 RCLK O
15 A15 RRAS O
16 A16 RWEN O
17 A17 LRD8 I/O
LRD10
18 A18 I/O
19 A19 LRD12 I/O
20 A20 LRD14 I/O
LRD7 I/O
21 A21
22 A22 LRD5 I/O
23 A23 LRD3 I/O
24 A24 LRD1 I/O
25 A25 VSS -
26 A26 VSS -
27 B1 VSS -
28 B2 VSS -
29 B3 HRD3 I/O
30 B4 HRD1 I/O
31 B5 HRD8 I/O
HRD10
32 B6 I/O
33 B7 HRD12 I/O
34 B8 HRD14 I/O
RA0 O
35 B9
36 B10 RA2 O
37 B11 RA4 O
B12 RA6 O
38
39 B13 RA8 O
40 B14 RCLKE O
41 B15 RCAS O
42 B16 RQML O
43 B17 LRD9 I/O
44 B18 LRD11 I/O
45 B19 LRD13 I/O
46 B20 LRD15 I/O
47 B21 LRD6 I/O
48 B22 LRD4 I/O
LRD2
49 B23 I/O
50 B24 LRD0 I/O
51 B25 VSS -
VSS -
52 B26
53 C1 HRD5 I/O
54 C2 HRD4 I/O
C3 VSS -
55
56 C4 ADAT13 I/O
57 C5 ADAT12 I/O
58 C6 ADAT11 I/O
59 C7 ADAT10 I/O
60 C8 ADAT9 I/O
61 C9 ADAT8 I/O
62 C10 ADAT7 I/O
63 C11 RA10 O
64 C12 RA11 O
65 C13 RA12 O
RA13
66 C14 O
67 C15 RQMH O
68 C16 RCLKIN I
C17 ADAT6 I/O
69
70 C18 ADAT5 I/O
71 C19 ADAT4 I/O
72 C20 ADAT3 I/O
73 C21 ADAT2 I/O
74 C22 ADAT1 I/O
75 C23 ADAT0 I/O
76 C24 VSS -
77 C25 VSS -
78 C26 CD15 I/O
79 D1 HRD7 I/O
HRD6
80 D2 I/O
81 D3 ADAT14 I/O
82 D4 VSS -
VSS -
83 D5
84 D6 VDDS -
85 D7 VDDS -
D8 VDDS -
86
87 D9 VDDS -
88 D10 VDDS -
89 D11 VDDS -
90 D12 VDDS -
91 D13 VDDS -
92 D14 VDDC -
93 D15 VDDC -
94 D16 VDDC -
95 D17 VDDC -
96 D18 VDDC -
97 D19 VDDC -
32
FUNCTION
Ground
DRAM data bus
DRAM address bus
SDRAM clock signal
DRAM row address strobe (RAS signal)
DRAM write enable
DRAM data bus (Lower data)
Ground
DRAM data bus
DRAM address bus
SDRAM clock enable
DRAM column address strobe (CAS signal)
MASK signal (SDRAM)
DRAM data bus (Lower data)
Ground
DRAM data bus
Ground
Data bus (ABUS)
DRAM address bus
MASK signal (SDRAM)
SDRAM, DRAM clock input
Data bus (ABUS)
Ground
Data bus of internal register
DRAM data bus
Data bus (ABUS)
Ground
Power supply +3.3 V
Power supply +1.5 V
PIN
OUTER
NAME I/O
NO.
NO.
98
D20 VDDC -
99 D21 VDDC -
100 D22 VSS -
101 VSS -
D23
102 D24 CD14 I/O
103 D25 CD13 I/O
104 D26 CD12 I/O
105 E1 ACLK I/O
106 E2 ADIR O
107 E3 ADAT15 I/O
108 E4 VSS -
109 E23 VSS -
110 E24 CD11 I/O
111 E25 CD10 I/O
112
E26 CD9 I/O
113 F1 MELI7 I
114 F2 DITo O
115 AFRM
F3 I/O
116 F4 VDDC -
117 F23 VDDS -
118 CD8 I/O
F24
119 F25 CD7 I/O
120 F26 CD6 I/O
121 G1 MELI4 I
122 G2 MELI5 I
123 G3 MELI6 I
124 G4 VDDC -
125 G23 VDDS -
126 G24 CD5 I/O
127 G25 CD4 I/O
128 G26 CD3 I/O
129 H1 MELI1 I
130 H2 MELI2 I
131 H3 MELI3 I
VDDC
132 H4 -
133 H23 VDDS -
134 H24 CD2 I/O
H25 CD1 I/O
135
136 H26 CD0 I/O
137 J1 BCLK O
138 J2 ADLR O
139 J3 MELI0 I
140 J4 VDDC -
141 J23 VDDS -
142 J24 CA0 I
143 J25 CA1 I
144 J26 CA2 I
145 K1 WCLK0 O
CK512
146 K2 O
147 K3 CK128 O
148 K4 VDDC -
VDDS -
149 K23
150 K24 CA3 I
151 K25 CA4 I
K26 CA5 I
152
153 L1 MELO6 O
154 L2 MELO7 O
155 L3 WCLK1 O
156 L4 VDDC -
157 L11 VSS -
158 L12 VSS -
159 L13 VSS -
160 L14 VSS -
161 L15 VSS -
162 L16 VSS -
VDDS
163 L23 -
164 L24 CA6 I
165 L25 CA7 I
CA8 I
166 L26
167 M1 MELO3 O
168 M2 MELO4 O
169 M3 MELO5 O
170 M4 VDDC -
171 M11 VSS -
172 M12 VSS -
173 M13 VSS -
174 M14 VSS -
175 M15 VSS -
176 M16 VSS -
177 M23 VDDS -
178 M24 CA9 I
179 M25 CA10 I
CA11 I
180 M26
181 N1 MELO0 O
182 N2 MELO1 O
N3 MELO2 O
183
184 N4 VDDC -
185 N11 VSS -
186 N12 VSS -
187 N13 VSS -
188 N14 VSS -
189 N15 VSS -
190 N16 VSS -
191 N23 PLL_AVS -
192 N24 CA12 I
193 N25 CA13 I
CA14
194 N26 I
DM: IC300
FUNCTION
Power supply +1.5 V
Ground
Data bus of internal register
Clock signal (ABUS)
Direction signal (ABUS)
Data bus (ABUS)
Ground
Data bus of internal register
MEL wave data input
Digital audio output
Frame signal (ABUS)
Power supply +1.5 V
Power supply +3.3 V
Data bus of internal register
MEL wave data input
Power supply +1.5 V
Power supply +3.3 V
Data bus of internal register
MEL wave data input
Power supply +1.5 V
Power supply +3.3 V
Data bus of internal register
Master clock (64 Fs)
For ADC word clock
MEL wave data input
Power supply +1.5 V
Power supply +3.3 V
Address bus of internal register
For DAC word clock
Master clock (512 Fs)
Master clock (256 Fs)
Power supply +1.5 V
Power supply +3.3 V
Address bus of internal register
MEL wave data output
For DAC word clock
Power supply +1.5 V
Ground
Power supply +3.3 V
Address bus of internal register
MEL wave data output
Power supply +1.5 V
Ground
Power supply +3.3 V
Address bus of internal register
MEL wave data output
Power supply +1.5 V
Ground
Analog ground (PLL)
Address bus of internal register