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MN662771AW :
IC101 (DP23S87T)
No.
Symbol
1
BDO
2
OFT
3
/RFDET
4
VDET
5
LDON
6
NC
7
8
AVSS3
9
AVDD3
10
FBAL
11
TBAL
12
FE
13
NC
14
15
TE
16
I
NC
18
19
RFENV
20
VREF
21
ARF
22
DRF(NC)
23
DSLF
24
IREF
25
PLLF
26
PLLF2
27
VCOF
28
VCOF2
29
TRV
30
TVD
31
PC
32
ECM
33
ECS
34
KICK
35
TRD
36
FOD
37
TOFS
38
AVDD2
39
AVSS2
40
DVSS2
41
EFM/CK384(NC)
42
PCK/DSLB
43
/CLDCK(NC)
44
FCLK(NC)
45
IPFLAG(NC)
I/O
I
Drop-Out signal input terminal. (H:Drop-Out)
I
Off Track signal input terminal. (H:Off Track)
I
RF detect signal input terminal. (L:detection)
I
Vibration detect signal input terminal. (H:detection)
O
Laser ON signal output terminal. (H:ON)
-
No connect terminal.
-
GND connect terminal for analog circuit.
-
Power supply terminal for analog circuit.
O
Focus Balance adjustment output terminal.
O
Tracking Balance adjustment output terminal.
I
Focus Error signal input terminal. (analog input)
-
No connect terminal.
I
Tracking Error signal input terminal. (analog input)
-
No connect terminal.
I
RF Envelop signal input terminal. (analog input)
I
VREF input terminal.
I
RF signal input terminal. (for DSL)
I
Bias terminal for DSL. (No connect)
I/O Roop Filter terminal for DSL.
I
Standard current input terminal.
I/O Roop Filter terminal for PLL.
I/O Characteristic Roop Filter switching terminal for PLL.
I/O Roop Filter terminal for VCO.
I/O Terminal of Digital Servo (33.8688MHz)/Roop Filter for VCO.
O
Traverse compulsion sending output terminal.
O
Traverse drive output terminal.
O
Spindle Motor ON output terminal.
O
Spindle Motor driving signal terminal. (compulsion mode output) 3-State
O
Spindle Motor driving signal terminal. (Servo Error signal output)
O
Kick Pulse output terminal. 3-State
O
Tracking Drive output terminal.
O
Focus Drive output terminal.
O
Tracking Offset adjustment output terminal.
-
Power supply terminal for analog circuit. (for DSL,PLL,AD and DA block)
-
GND connect terminal for analog circuit. (for DSL,PLL,AD and DA block)
-
GND connect terminal for digital circuit.
O
EFM signal output terminal at IOSEL=L. (No connect)
PLL Sampling Clock output terminal. (fPCK=4.3218MHz)
O
*at default:PLL Sampling Clock output
*at fulfillment command:DSL Balance output
Sub Code Frame Clock signal output terminal. (fCLDCK=7.35KHz)
O
(No connect)
Crystal Frame Clock signal output terminal. (fFCLK=7.35KHz)
O
(No connect)
Interpolation Flag signal output terminal. (H:Interpolation)
O
(No connect)
- 28 -
CDE-9841/CDE-9841E
Terminal Description
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