Related Manuals for Haier HL26ATB
Summary of Contents for Haier HL26ATB
- Page 1 HL26ATB １...
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Page 2: Table Of Contents
1. Features-------------------------------------------------3 2. Safety Precautions----------------------------------4 3. Images of Module and Circuit Boards--------6 4. Key IC Description& Trouble Shooting Guide ------------------------8 5.Signal Flowing Chart-------------------------------11 6. Bus Control Adjustment-------------------------12 7. Circuit Diagram ------------------------------------27 8. Connection Sketch Interpretat----------------52 ２... -
Page 3: Features
Features 一、 Product features Functions Screen size 26''Wide Aspect ratio 16:9 Brightness 500cd/m2 800:1 Contrast Ratio(Darkroom) 1366*768) Resolution（HD/ED） Response Time（ms） Angel of view H:160˚/ V:150˚ 16.2M Colors Supported Colors HDTV HDTV\EDTV\SDTV intergrate NTSC\ATSC TUNER 3D COMB filer Multiple Picture modes Color temperature control CHILD LOCK/PARENTAL GUIDANCE (USA) QUICK VIEW... -
Page 4: Safety Precautions
Safety Precautions... -
Page 6: Images Of Module And Circuit Boards
三、Images of Module and Circuit Boards Signal flow-chart ６... - Page 7 b. Printed Circuit Digital Board(Main Board&AV Board) Main board AV board ７...
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Page 8: Key Ic Description& Trouble Shooting Guide
三、 Key IC Description& Trouble Shooting Guide 1. Key IC Description 1）ATI240 ８... - Page 9 2）MSP 4440 ９...
- Page 10 2. Trouble Shooting Guide １０...
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Page 11: Signal Flowing Chart
Signal Flowing Chart... -
Page 12: Bus Control Adjustment
Bus Control Adjustment 1）Factory Mode Press VOL-,CH-,INPUT of the key board orderly,and loosen them together.Then enter the Factory Mode.You can check the version of the software,adjust some settings.But we don’t advise you change this settings.because of the TV has already hold in the state of optimality.If you have to chang this settings,please connect with the local service center. １２... - Page 13 １３...
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- Page 23 Remark: The date of the chart only is a example,please don’t adjust the factory mode base on it. ２３...
- Page 24 2）Others ２４...
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Page 27: Circuit Diagram
Circuit Diagram ２７... - Page 28 MEM_DQ[31:0] 4 MAD[14:0] MEM_DQ0 MEM_AD0 MAD0 AC28 DQA0 MAA0 MEM_DQ1 AC29 MEM_AD1 MAD1 DQA1 MAA1 MEM_DQ2 MEM_AD2 MAD2 AD29 DQA2 MAA2 MEM_DQ3 MEM_AD3 MAD3 AE30 DQA3 MAA3 MEM_DQ4 MEM_AD4 MAD4 AD28 DQA4 MAA4 MEM_DQ5 MEM_AD5 MAD5 AC27 DQA5 MAA5 MEM_DQ6 MEM_AD6 MAD6 AD30...
- Page 29 THIS PAGE ONLY FOR 4 LAYERS PCB, IF CUSTOMER WANT TO USE 6 LAYERS PCB, PLEASE CONTACT WITH ATI AE TEAM. MEM_VREF MEM_DQ[31:0] 3 MEM_VREF MDQ10 RP1D MEM_DQ10 VREF MDQ11 RP1C MEM_DQ11 MDQ9 RP1B MEM_DQ9 MAD[14:0] MAD0 MDQ8 RP1A MEM_DQ8 MAD1 MDQ15 RP2D...
- Page 30 +5V_Tuner +3.3V FQD1236MK5 6.8K_DNI 6.8K TUNER_SDA I2C_DATS 7,17 2N7002LT1_DNI +5V_Tuner +5V_Tuner +5V_Tuner +5V_Tuner +3.3V C532 C533 C534 C535 +5V_Tuner 10uF_10V_DNI 10uF_10V_DNI 10uF_10V_DNI 10uF_10V_DNI TUNER_GND TUNER_GND TUNER_GND TUNER_GND 6.8K_DNI TUNER_SCL I2C_CLKS 7,17 2N7002LT1_DNI +5V_Tuner FAT_IF_AGC X_FAT_IFAGC 6 220R FB53 100nF TUNER_GND 220uF_16V 100nF 100pF...
- Page 31 These CAPs should be close to X240 FS_DVDD 100nF XVIN0 XVIN1 100nF 100nF 100nF XVIN2 FS_OUTP 100nF XVIN3 FS_OUTN FS_DVDD FS_AVDD VI_IN0 FS_DVDD 100nF FS_DVSS XVIN4 VI_IN1 FS_DVSS FS_AVDD VI_IN2 FS_AVDD XVIN5 TP17 TP16 100nF FS_AVSS VI_IN3 FS_AVSS VI_IN4 FDC_AGC XVIN6 100nF 100nF...
- Page 32 +3.3V +3.3V NOTE: Customer should add proper EMI & ESD components for HDMI interface +5V_HDMI Suggestion: CM2021 for ESD protection & use ACM2012D-900-2P as EMI filter BAS32L/SOD80C R354 R355 6.8K_DNI R356 6.8k_DNI R357 2N7002LT1 2N7002LT1 6.8k 6.8k VGA_SCL VGA_EDID_SCL VGA_EDID_SDA VGA_SDA +3.3V +3.3V...
- Page 33 ALL Filter Values are preliminary and subject to Change Pr-out 0R_DNI TP37 DAC0_R .47uH_DNI HSYNC_OUT Pr-out 0R_DNI TP39 DAC1_G .47uH_DNI Y-out Y-out VSYNC_OUT Pb-out DAC2_B .47uH_DNI Pb-out CVBS1-out 0R_DNI DAC3_COMP .47uH_DNI AG10 HSYNC2_OUT CVBS1-out 0R_DNI VSYNC2_OUT DAC0_R C120 C121 DAC0/R DAC1_G C122 C123...
- Page 34 BAV99L BAV99L BAV99L DSUB15P/FHD VGA Input +3.3V VGAR CRAD 17R/0.6A/0805 FB59 RED_AD VGAG CGAD 17R/0.6A/0805 FB60 GREEN_AD 7 VGAB CBAD 17R/0.6A/0805 FB61 BLUE_AD E_DET CHSAD 17R/0.6A/0805 R251 100R HSYNC_AD 7 VGA5V 17R/0.6A/0805 R252 100R CVSAD LINE_OUTL VSYNC_AD 7,24 +5V_VGA C548 C549 C550 R257...
- Page 35 +3.3V JP10 JP11 ROMCS_NFCE0# MD_ON ROMSCK_NFALE ROMSI_NFRE# ROMSO_NFWE# pin header p:2.54 Header_2_Pin_1X2 Header_6_Pin_1X6 NFCLE NFCLE pin header p:2.54 ROMSCK_NFALE NFALE ROMSO_NFWE# NFWE# NFCE1# NFCE#1 ROMSI_NFRE# NFRE# NFRY_BY# NFRY_BY# ROMCS_NFCE0# NFCE#0 M25P40-VMN6T_DNI +3.3V +3.3V NFIO0 NFIO0 ROMSI_NFRE# ROMSO_NFWE# NFIO1 NFIO1 NFIO2 NFIO2 ROMSCK_NFALE NFIO3...
- Page 36 TxOUT0- R101 100R_DNI TxOUT0+ TxOUT1- R100 100R_DNI TxOUT1+ TxOUT2- R102 100R_DNI TxOUT2+ TxCLKOUT- R103 100R_DNI TxCLKOUT+ TxOUT0- DVODATA0 RP12D AJ19 TxOUT0- DVODATA0 DVODATA1 TxOUT0+ RP12B AK19 TxOUT0+ DVODATA1 DVODATA2 TxOUT3- R104 100R_DNI RP12C AG18 DVODATA2 TxOUT3+ DVODATA3 RP12A AJ18 DVODATA3 DVODATA4 TxOUT1- RP13A...
- Page 37 I2SCLK_MSP I2SSCK_INC RP10D XI2SWSA I2SWS_MSP I2SWS_OUTA 13 I2SWS_INC I2SWS_OUTA/DREQA# RP10B AH10 XI2SCKA I2SSD_MSP I2SCLK_OUTA 13 I2SSD_INC I2SSCK_OUTA RP10A AJ10 XI2SOSCKA I2SSOSCK_OUTA AG11 XI2SSDA RP10C I2SDATA_OUTA 13 I2SSD_OUTA I2SCLK_DVI I2SSCK_IND RP11C I2SWS_OUTB AK10 BRI2SWSB I2SWS_DVI I2SWS_IND I2SWS_OUTB/DREQB# RP11A I2SCLK_OUTB AH11 BRI2SCKB I2SSD_DVI I2SSD_IND I2SSCK_OUTB...
- Page 38 +5V_AUDIO C188 C189 100nF 100nF C190 C191 100nF 100nF +3.3V C192 10uF_10V MSP_AUROUT 25 C193 C194 C195 10uF_10V 100nF MSP_AULOUT 25 C185 4.7uF_16V 100nF R293 R294 R123 R124 0R_DNI 330R 330R R125 100R 0R_DNI 7,17 I2C_CLKA R126 100R 7,17 I2C_DATA LINE_AULOUT 12 R127 100R_DNI...
- Page 39 L39, C449, C452 and C571 are placeholders. The actual values may change. To start, L39 is 390nH. This is a coilcraft 0805CS-391XJBC. - 390nH @100MHz - Qmin = 48 @ 250 MHz - SRFmin = 560Mhz - Rdc Max = 1.5 Ohms +3.3V - Idc Max = 290mA Doing the calculations the C452 capacitor want to be ~36 pf.
- Page 40 Insert if software wants to control the power state of the USB +3.3V R150 10K_DNI R149 0R_DNI GPIO_USB_CNTRL# R384 10K_DNI +3.3V C234 C235 100nF 10nF/50V/Y5V R151 100K_DNI M4-I12501 R364 FSMD050-1206 FB69 PTC_USB0 FIL_PWR_USB0 Cntrl USB_Stacked USB_OVERCURRENT Flag C236 100uF_16V USDAT0- GATE Low ESR MIC2545-1YM_DNI...
- Page 41 MCU_3.3V MCU_3.3V C243 C244 +3.3V +3.3V 100nF 100nF C242 C245 100nF 100nF BAV99L BAV99L RS-232 In Debug Port D/TXD1 0.15uH/0.25A/0805 15,19 TV_Micro_TXDA T1IN T1OUT D/RXD1 0.15uH/0.25A/0805 TV_Micro_RXDA R1OUT R1IN TXDO D/TXD2 0.15uH/0.25A/0805 T2IN T2OUT RXDI D/RXD2 0.15uH/0.25A/0805 R2OUT R2IN +3.3V +3.3V 232_EN# C551...
- Page 42 R160 R161 22R XILLEON_RESET_IN# 14 XRESET_OUT# GPIO_MSP_RESET# 6,13 +3.3V +3.3V +3.3V R299 4.7K/1% R0603 C247 SYS_RESET# SYS_RESET# R163 C248 RST# RSTN 4.7K_DNI 100nF_DNI 10uF_16V_DNI PBRST# C460 DS1819C_DNI PST414A270N_SOT23 560pF TP12 C0603 R164 R300 100K_DNI RESET_HI 0R_DNI +3.3V Reset Button EJTAG_RST# 14,24 TV_Micro_Reset# 14,24 SYS_RESET#...
- Page 43 +3.3V CORE_1.2V VDDP_1 VSS_1 VSS_57 VDDC_1 VDDP_2 VSS_2 VSS_58 VDDC_2 VDDP_3 VSS_3 VSS_59 VDDC_3 VDDP_4 OPTIONAL VSS_4 VSS_60 VDDC_4 VDDP_5 +3.3V VDDC POWER ON VSS_61 VDDC_5 VDDP_6 SAME TIME AS +3.3V VSS_6 VSS_62 VDDC_6 VDDP_7 DIODE CIRCUIT VSS_7 VSS_63 VDDC_7 VDDP_8 BGA388/FAN VSS_8...
- Page 44 Boot ROM Enable: FAD(0) Reserved - internal pull down. Should be "0" during reset Boot Vector: FAD(2:1) Reserved - internal pull downs. Should be "00" during reset System Configuration: FAD(4:3) 00 - SOLO (Default) +3.3V T31x_SO 01 - Reserved +3.3V 10 - Reserved R180 10K_DNI R181 10K_DNI...
- Page 45 +12V +3.3V +12V FB70 120R/3A/1206 6.8uH plcae near pin 8' C328 C329 C333 100nF 1uF_16V C339 C338 22uF_16V C330 C331 C332 C334 C335 C336 C337 100uF_16V C340 ESR=0.38R 100nF Place C88 between Place R1, and C88 100uF_16V 22uF/16V 100nF C342 10nF/50V/Y5V 10nF/50V/Y5V pins 9 and 7...
- Page 46 ADC0_AVDD +3.3V REG2 Place 10uF and Bead near the ASIC. The high frequency Tab_Vout caps on page 7 should be placed directly across ADC1.8V FB75 120R/3A/1206 Vout ADC0_AVDD and AVSS pins. 0603 C363 C364 R204 C365 100nF 22uF_16V LM1117MPX-ADJ 187R 10uF_10V ESR=0.38R C366...
- Page 47 +12V R307 R308 +12V 2.2R C465 2.2R 0805 BAT54 0.1uF/50V 0805 C466 C526 C467 4.7uF_16V 470uF_16V_H_DIP 1uF_16V BOOT PHASE R309 OCSET/PH C468 UGATE 1uF_16V +3.3V 22uH LGATE AO4800 C470 R310 0805 C469 C527 RT9214PS Rtop 1nF_DNI 2.2R_DNI 4.7uF_16V 470uF_16V_H_DIP R311 4.7K/1% Pull FB trace out after Cout Vo = Vref(1+Rtop/Rbot)
- Page 48 +12V_IN +12V +12V_IN C558 C559 C560 LED_DNI +5VSB Power-jack_DNI 0.1uF/50V_DNI 470uF_16V_DNI R226 330R_DNI +12V_IN +5VSB C0603 0.1uF/50V_DNI C0603 REG10 POWER Applied AO4801H_DNI Tab_Vout Vout LM1117MPX-5V_DNI 16,24 POWER_ON 2N7002LT1_DNI 16,24 POWER_ON +5VSB +5VSB +12V R227 MCU_3.3V POWER ON LED +5VSB REG11 R406 6.2K/1%_DNI POWER_ON...
- Page 49 2N7002LT1 R235 33R ATmega48v_DNI Daul footprint(MLF) IROUT XIRRXDA TP13 R236 33R TV_Micro_IR POWER_ON 16,23 R233 ADC6 169K ADC7 AFT_ADCIN AREF AVCC R234 330K MCU_3.3V ATmega48v R369 R370 TV_Micro_RESET# 14,17 TV_Micro_TXDAA SYS_PW_LED1 TV_Micro_RXDAA TV_Micro_IR SYS_PW_LED key_y1 Amp_Mute 12,25 TV_Micro_Pwr_On# TV_Micro_Pwr_On# TV_Micro_SDA 17 TV_Micro_INT# TV_Micro_SCL 17 key_y2...
- Page 50 +12V V12_TPAP +12V V12_TPAA 33uH/SU0810 TP65 ROUT- FB36 FB37 C475 120R/3A/1206 120R/3A/1206 C476 C478 C481 1N4002_DNI C477 C479 C480 C482 33uH/SU0810 ROUT+ C483 V12_TPAP 1N4002_DNI V5_TPA TP66 C484 10nF/50V/Y5V C485 10nF/50V/Y5V FB38 120R/3A/1206 V5_TPA C486 V12_TPAP V5_TPA C490 AUDIO_EN R322 R324 Amp_Mute 12,24...
- Page 51 +3.3V +3.3V BAV99L +3.3V BAV99L +3.3V Ear Phone Out 120K 17R/0.6A/0805 LINE_OUTL 0.15uH/0.25A/0805 E_DET E_DET 17R/0.6A/0805 LINE_OUTR 0.15uH/0.25A/0805 +3.3V +3.3V LINE_OUTL +3.3V LINE_OUTR AV2_1 Phone_Jack/H_AJ310-5N BAV99L PR_IN BAV99L BAV99L COM_R PB_IN COM_L Y_IN +3.3V +3.3V +3.3V CV_IN_R BAV99L BAV99L BAV99L SV_IN_R CV_IN_L COM_L...
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Page 52: Connection Sketch Interpretat
Connection Sketch Interpretat ５１...