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Pin No.
Signal Name
31
POS.SW3
32
POS.SW2
33
POS.SW1
34
RESET(L)
35
32KHz IN
36
32KHz OUT
37
+5V(D)
38
12MHz.IN
39
12MHz.OUT
40
GND(D)
41
POWER OFF(L)
42
FIP ON(L)
43
12M.START(H)
44
LC.OSC IN
45
LC.OSC OUT
46
GND
47
4FC.LPF
48
OSD.FSC IN
49
GND(OSD)
50
CVIN
51
LECHA
52
CVOUT
53
5V(OSD)
54
HLF
55
AMUTE(H)
56
CVIN(EDS)
57
GND
58
SECAM/PAL(SYS2)
59
SECAM.V.IN
60
OSD PULSE
61
SLEEP(L)
62
UNLOADING(H)
63
LOADING(H)
64
FLD CS
65
MESECAM DET(H)
66
LP(H)
67
NC
68
FLD DATA OUT
69
FLD DATA IN
70
FLD CLK
71
IIC CLK
72
IIC DATA
73
125Hz
74
CAP.R/F
I/O
Input terminal for mechanism position.
I
D.A.REC(H)
I
BIAS(L)
I
I
MICOM reset input terminal.
I
Sub oscillator input.
O Sub oscillator output.
-
Power.
I
Main oscillator input.
O Main oscillator output.
-
Control signal for power circuit.
*Low is existed when turning off the power supply for concerned circuit.
O
*High is existed while power is supplied to mechanism and/or concerned circuit,
although it
seems to be power off.
Control signal for FIP on/off.
P-OFF in power save mode: "H" is output.
O
Other than above: "L" is output.
(Output switching timing of FIP"L" is same with the switching timing of POWER OFF
"L".)
I
Starting clock select terminal at releasing RESET.
I
OSC terminal for OSD dot clock.
O OSC terminal for OSD dot clock.
I
GND
I
NC
I
NC
-
GND
I
Composite video signal input terminal.
I
Composite video signal white level input terminal.
O CG video output teminal.
-
I
LPF connection terminal for SLICER (Used for OSD dot clock.)
O Audio mute signal only for RF convertor.
I
Composite video signal input terminal for SLICER.
I
O Output terminal for the unit recognition result of broad cast system.
I
Chroma input terminal for SECAM SUPERIMPOSE.
O
Abstraction signal for BOX from the video signal at SUPERIMPOSE.
Power circuit control signal for super power save mode.
*P-OFF in power save mode: "L" is output.
O
Other than above: "H" is output.
*Output switching timing of FIP "L" is same with the switching timing of POWER OFF
"L".)
Control signal for Loading motor forward.
O
*High is existed when the loading motor rotates reverse direction and/or breaking.
Control signal for Loading motor reverse.
O
*High is existed when the loading motor rotates forward direction and/or breaking.
O FLD chip select terminal.
I
Detection between MESECAM and NORMAL in playback mode.
Output signal depens on tape speed in both EE and VV modes.
O
* During N4H,N6H,P6H or P9H: High.
* Other than above speed: Low.
Non connect.
O
* Low fixed.
O Serial data output signal for FIP driver.
I
Serial data input signal for FIP driver.
O Serial clock signal for FIP driver.
O IIC clock for all IIC devices
O IIC data for all IIC devices
125Hz output for adjustment of clock accuracy .
O
(Output in only TEST MODE 2.)
O Control signal for capstan motor diriction.
Describe
140mS
140mS
P-OFF P-SAVE P-FAIL Reset
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
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Low
Low
Low
Low
Low
High
Low
Low
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High
High
Low
High
In
In
In
In
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Low
Low
Low
Low
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Low
Low
Low
Low
High
Low
Low
High
Low
Low
Low
Low
Low
Low
Low
Low
Not fix Not fix
Low
Low
In
In
In
In
Low
Low
Low
Low
Low
Low
Low
Low
Not fix Not fix
Low
Low
Not fix Not fix
In
In
Not fix Not fix
Low
Low
Not fix Not fix
Low
Low
Not fix Not fix
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
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