Denon S-101 Service Manual page 27

MX29LV800ABTC-70 (RL-S874: U10)
BLOCK DIAGRAM
A15 1
2
A14
A13 3
A12 4
A11 5
A10 6
A9 7
A8 8
A19 9
NC 10
WE 11
RESET 12
NC 13
NC 14
15
RY/BY
A18 16
A17 17
A7 18
A6 19
A5 20
A4 21
A3 22
A2 23
A1 24
CONTROL
CE
OE
INPUT
WE
LOGIC
RESET
ADDRESS
LATCH
A0-A19
AND
BUFFER
Q0-Q15/A-1
PROGRAM/ERASE
HIGH VOLTAGE
STATE
REGISTER
FLASH
ARRAY
ARRAY
SOURCE
HV
Y-PASS GATE
PGM
SENSE
DATA
AMPLIFIER
HV
DATA LATCH
PROGRAM
DATA LATCH
I/O BUFFER
27
48 A16
47 BYTE
46 GND
45 Q15/A-1
44 Q7
43
Q14
42 Q6
41 Q13
40 Q5
39 Q12
38 Q4
37 VCC
36 Q11
35 Q3
34 Q10
33 Q2
32 Q9
31 Q1
30
Q8
29 Q0
28 OE
27 GND
26 CE
25 A0
WRITE
STATE
MACHINE
(WSM)
COMMAND
DATA
DECODER
COMMAND
S-101