Sanyo DVD-1500A Service Manual page 70

IC BLOCK DIAGRAM & DESCRIPTION
IC118 LE28DW8102T-90-MPB(FLASH MEMORY)
1
A15
2
A14
3
A13
4
A12
5
A11
6
A10
7
A9
8
A8
9
WE#
10
NC
11
NC
12
NC
13
NC
14
NC
15
NC
16
A18
17
A17
18
A78
19
A6
20
A5
21
A4
22
A3
23
A2
24
ACE#
STM.
A18 Bank Selective Address
A17-A0 Flush Bank Address
A17-A15 Flush Bank Block Address
A17-A10 Flush Bank Sector Sddress
DQ15-DQ0 Data Input/Output
CE# Chip Enable
OE# Output Enable
WE# Write Enable
VDD Power Supply
GND Ground
NC No Connection
IC480 SI3050C(DC REGULATER POWER SUPPLY)
1. GND
2. V (on/off)
C
3. Vo
4. Vosense
1 3 5
5. V
IN
2 4
48
A16
47
VSS CHARGE PUMP
46 DQ15
&
45
DQ7
VOLTAGE
44
DQ14
REFERENCE
43 DQ6
CIRCUIT
42
DQ13
41
DQ5
40 DQ12 ADDRESS BUFFER
39
DQ4
&
38
NC
LATCH CIRCUIT
37 VDD
36
DQ11
35
DQ3
34 DQ10
A18-A0
33
DQ2
32
DQ9
31 DQ1
CE#
30
DQ8
CONTROL LOGIC
OE#
29
DQ0
28 OE# WE#
27
VSS
26
A0
25 A1
NAME
Selects bank 1 when "L" and bank 2 when "H".
Sapply address for flush bank.
Select flush bank for erease.
Select flush bank sector for erease.
To output data during read cycle and receive input data during write
cycles. Data is internaliy latched during a writecycle. The output are
high inpedance when OE#,CE# is high.
To activate the flush bank when CE# is low.
To activate the data output buffer .
To control the write, erease and program.
207V~3.6V supply.
Not connect to internal chip.
1. GND
2. V (on/off)
C
3. Vo
4. Vosense
5. V
IN
1 2 3 4 5
Bottom View
COLUMN DECODER
LOW DECODER
DQ15.DQ0
FUNCTION
IC673 LA2615(SURROUND SIGNAL PROCESSER)
GCR GLR POG
P16 P15 P14
ANALOG
SURROUND
P1 P2 P3
CONT1 CONT2 CONT3
- 69 -
256Kx16
FLUSH
BANK1
256Kx16
FLUSH
BANK2
IN/OUTPUT BUFFER
&
DATA LATCH
LPFD NC VCC
P13 P12 P11
Vcc
ATT LEVER
VREF
P4 P5 P6
GND HFFC VREF
L-OUT R-OUT
P10 P9
A
SW
B
ON/OFF
B
SW
A
P7 P8
L-IN R-IN