Pioneer XV-DV232 Service Manual page 99

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No. Pin Name
25 SCL
26 LRCLK
27 SCLK
28 SDIN4
29 SDIN3
30 SDIN2
31 SDIN1
32 PSVC
33 VR_DIG
34 DVSS
35 DVSS
36 DVDD
37 BKND_ERR
38 DVSS
39 VALID
40 PWM_M_1
41 PWM_P_1
42 PWM_M_2
43 PWM_P_2
44 PWM_M_3
45 PWM_P_3
TE
L 13942296513
46 PWM_M_4
47 PWM_P_4
48 VR_PWM
49 PWM_M_7
50 PWM_P_7
51 PWM_M_8
52 PWM_P_8
53 DVSS_PWM
54 DVDD_PWM
55 PWM_M_5
56 PWM_P_5
57 PWM_M_6
58 PWM_P_6
59 PWM_HPML
60 PWM_HPPL
61 PWM_HPMR
62 PWM_HPPR
63 MCLK
64 RESERVED
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I/O
I I2C serial control clock input output
I Serial audio data left / right clock (sampling rate clock)
I Serial audio data clock (shift clock)
Serial audio data 4 input is one of the serial data input ports. SDIN4 supports four discrete (stereo) data
I
formats and is capable of inputting data at 64 Fs.
Serial audio data 3 input is one of the serial data input ports. SDIN3 supports four discrete (stereo) data
I
formats and is capable of inputting data at 64 Fs.
Serial audio data 2 input is one of the serial data input ports. SDIN2 supports four discrete (stereo) data
I
formats and is capable of inputting data at 64 Fs.
Serial audio data 1 input is one of the serial data input ports. SDIN1 supports four discrete (stereo) data
I
formats and is capable of inputting data at 64 Fs.
O Power supply volume control PWM output
−
Voltage reference for digital core supply 1.8 V.
−
Digital ground
−
Digital ground
−
3.3-V digital power supply
I Active low. A backend error sequence is generated by applying logic low to this terminal.
−
Digital ground
O Output indicating validity of PWM outputs active high
O PWM 1 output (differential - )
O PWM 1 output (differential +)
O PWM 2 output (differential - )
O PWM 2 output (differential +)
O PWM 3 output (differential - )
O PWM 3 output (differential +)
O PWM 4 output (differential - )
O PWM 4 output (differential +)
−
Voltage reference for digital PWM core supply 1.8 V.
O PWM 7 (Line out L) output (differential - )
O PWM 7 (Line out L) output (differential +)
O PWM 8 (Line out R) output (differential - )
O PWM 8 (Line out R) output (differential +)
−
Digital ground for PWM
−
3.3-V digital power supply for PWM
O PWM 5 output (differential - )
O PWM 5 output (differential +)
O PWM 6 output (differential - )
O PWM 6 output (differential +)
O PWM left channel headphone (differential - )
O PWM left channel headphone (differential +)
O PWM right channel headphone (differential - )
O PWM right channel headphone (differential +)
MCLK is a 3.3-V clock master clock input. The input frequency of this clock can range from 4 MHz to 50
I
MHz.
−
Connect to digital ground
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Pin Function
Q Q
3 6 7 1 3 1 5
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XV-DV232
7
8
9 4 2 8
0 5 8 2 9 9 4 2 8
m
9 9
A
B
C
9 9
D
E
F
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