Sony ICD-SX68 Service Manual page 34

ICD-SX68/SX68DR9/SX78/SX78DR9/SX88
Pin No. Pin Name
T2 SDR_CSZ1
T3 SDR_CSZ0
T4 SDR_BA1
T5 SDR_RASZ
T8 SDR_CKE1
T9 GND
T10 MWI_SO
T17 U70_SOUT
T18 U70_SRIN
T19 GND
T22 LCD_R5
T23 NC
T24 C_TMS
T25 VLOG
T26 CKO
U1 SDR_A12
U2 SDR_A11
U3 SDR_A10
U4 SDR_A9
U5 SDR_A8
U8 SDR_CASZ
U9 GND
U10 MWI_CS0
U11 MWI_SK
U12 GI/O_P1
U13 GI/O_P0
U14 L0_DET
U15 L1_DET
U16 ERR_RST_REQZ
U17 CK32KI
U18 REFCLKO
U19 D_TCK
U22 C_TDO
U23 VLOGIN
U24 C_TCK
U25 VPLL
U26 CKI
V1 I/O_A
V2 I/O_A
V3 I/O_A
V4 SDR_A6
V5 SDR_A5
V8 SDR_A7
V9 GND
V10 SPI1_SK
V11 MWI_CS1
V12 GND
V13 GND
V14 GND
V15 GND
V16 DSP_DET
V17 D_TMS
V18 D_TDO
V19 D_TRSTZ
V22 C_RTCK
V23 C_TRSTZ
V24 VPLLIN
V25 VDSPIN
V26 VDSP
W1 I/OGND
34
I/O
O Chip select signal (Low active) (Not used (Open))
O Chip select signal (Low active)
O Bank address
O RAS signal (Low active)
O Clock enable signal (Not used (Open))
— GND
O Data output (Not used (Open))
O Serial data output
I Serial data input
— GND
O R data (Not used (Open))
— Not used (Open)
I CPU debugger connection/On terminal
O REGLOG power output terminal (1.86V)
O Crystal connection/On terminal
O SDR address output
O SDR address output
O SDR address output
O SDR address output
O SDR address output
O CAS signal (Low active)
— GND
O Chip select 0 (Not used (Open))
O Clock output (Not used (Open))
I/O General purpose input/output terminal 1 (Not used (Open))
I/O General purpose input/output terminal 0 (Not used (Open))
I Voltage monitor/reset of logic 0 block (Not used (Open))
I Voltage monitor of logic 1 block
O Not used (Open)
I Reference clock input 32.768 kHz (Not used (Open))
O Reference clock output
O Input/output and interrupt input to general purpose I/O
O CPU debugger connection/On terminal
I REGLOG power input terminal
I CPU debugger connection/On terminal
O REGPLL power output terminal (1.2V)
I Crystal connection/On terminal
— Power supply to I/OA
— Power supply to I/OA
— Power supply to I/OA
O SDR address output
O SDR address output
O SDR address output
— GND
O SPI1 clock output
O Chip select 1 (Fixed to "L")
— GND
— GND
— GND
— GND
I Voltage monitor of DSP block
O CPU debugger connection/On terminal
I CPU debugger connection/On terminal (Not used (Open))
I CPU debugger connection/On terminal (Not used (Open))
O CPU debugger connection/On terminal
I CPU debugger connection/On terminal (Low active)
I REGPLL power input terminal
I REGDSP power input terminal
O REGDSP power output terminal (Not used (Open))
— GND
Description