Clock - Philips DVDR890 Service Manual

Circuit-, IC Descriptions and List of Abbreviations
MPEG-2 video and MPEG-audio/AC-3 audio
encoder with multiplexer
6 PINNING
SYMBOL PIN
V 1 ground
SSP
SDATA1 2 input
SCLK1 3 input/output
SWS1 4 input/output
V 5 supply
DDP
SDATA2 6 input/output
SCLK2 7 input/output
SWS2 8 input/output
ACLK 9 output
V 10 ground
SSP
IDQ 11 input
YUV0 12 input
YUV1 13 input
YUV2 14 input
YUV3 15 input
YUV4 16 input
YUV5 17 input
YUV6 18 input
YUV7 19 input
V 20 ground
SSP
HSYNC 21 input
VSYNC 22 input
FID 23 input
VCLK1 24 input
V 25 ground
SSCO
V 26 ground
SSCO
V 27 supply
DDCO
V 28 supply
DDCO
V 29 supply
DDP
VCLK2 30 input
PDOAV 31 3-state output
PDIDS 32 input
PDOSYNC 33 3-state output
V 34 ground
SSP
PDOVAL 35 3-state output
PDO0 36 3-state output
2001 Aug 01
I
max
(1)
INPUT/OUTPUT
(mA)
−
−
4
4
−
4
4
4
4
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
4
−
4
−
4
4
DVDR880-890 /0X1
DESCRIPTION
pad ground
2
I S-bus serial data input port 1 with internal pull-down resistor
2
I S-bus serial clock port 1 with internal pull-down resistor
2
I S-bus word select port 1 with internal pull-down resistor
pad ring supply voltage (3.3 V)
2
I S-bus serial data port 2 with internal pull-down resistor
2
I S-bus serial clock port 2 with internal pull-down resistor
2
I S-bus word select port 2 with internal pull-down resistor
audio clock output (256 × f
pad ground
reserved (recommended connect to pin V
pull-down resistor
video input signal bit 0 (LSB)
video input signal bit 1
video input signal bit 2
video input signal bit 3
video input signal bit 4
video input signal bit 5
video input signal bit 6
video input signal bit 7 (MSB)
pad ground
horizontal sync input (video) with internal pull-down resistor
vertical sync input (video) with internal pull-down resistor
video ?eld identi?cation input (odd/even ?eld) with internal
pull-down resistor
video clock input 1 (27 MHz) with internal pull-down resistor
core ground
core ground
core supply voltage (2.5 V)
core supply voltage (2.5 V)
pad ring supply voltage (3.3 V)
video clock input 2 (27 MHz) with internal pull-down resistor
parallel stream data output for audio/video identi?er
parallel stream data input for data strobe (request for packet in
Data Expansion Bus Interface (DEBI) slave mode) with internal
pull-up resistor
parallel stream data output for packet sync
pad ground
parallel stream data valid output with internal pull-up resistor
parallel stream data output bit 0 (LSB)
7
9.
SAA6752HS
or 384 × f
)
s s
) with internal
SSP
EN 191