Samsung SENS R55 Service Manual page 143

4
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
MICOM_P3V
D529
BAT54C
R943 20K
R942
1K
2
1%
1
HDR-2P-SMD
C
J23
CMOS CLEAR
CHP3_RTCRST*
19-?3 19-?2 19-?1
TP198
TP199
B
P3.3V P3.3V
Q33
RHU002N06
20-D? 22-C3 37-C2 55-C3
SMB3_CLK
A
20-D? 22-C3 37-C2 55-C3
SMB3_DATA
Q34
RHU002N06
4
3
R951 10M
Y3
32.768KHz
1 4
PRTC_BAT
2 3
C376
0.007nF
19-?4 19-?2 19-?1
CHP3_RTCRST*
C893 C892
1000nF 1000nF
6.3V
CHP3_AZ_MDC_BCLK
CHP3_AZ_AUD_BCLK
CHP3_AZ_AUD_SYNC
CHP3_AZ_MDC_SYNC
CHP3_AZ_AUD_RST*
CHP3_AZ_MDC_RST*
CHP3_AZ_MDC_SDO
CHP3_AZ_AUD_SDO
CHP3_SATALED*
Place near to the ICH7
CLK3_SMBCLK
17-B4 17-B2 7-C4
CLK3_SMBDATA
17-B4 17-B2 7-C4
3
PRTC_BAT
**Note
Internal VR Strap
Enable
(VccSus1_05 : NC)
Disable
AB1
RTXC1
AB2
RTCX2
AA3
CHP3_RTCRST* RTCRST*
19-?1 19-?3 19-?4
TP517
Y5
INTRUDER*
W4
INTVRMEN
W1
EE_CS
Y1
C377 EE_SHCLK
Y2
EE_DOUT
0.007nF
W3
EE_DIN
V3
LAN_CLK
U3
LAN_RSTSYNC
U5
nostuff nostuff nostuff
LAN_RXD0
V4
LAN_RXD1
T5
LAN_RXD2
U7
LAN_TXD0
V6
LAN_TXD1
V7
LAN_TXD2
R947
40-B1 33
38-D4 R948 33 5% U1
ACZ_BIT_CLK
38-D4 R946 33 5% R6
ACZ_SYNC
R945 33 5%
40-B2
38-D4 R262 33 5% R5
ACZ_RST*
R263 33 5%
40-B2
T2
CHP3_AZ_SDI0 ACZ_SDIN0
38-D4 T3
ACZ_SDIN1
CHP3_AZ_SDI1
T1
40-B2
ACZ_SDIN2
40-B2 R265 33 5%
R264 33 5% T4
38-D4
ACZ_SDOUT
40-A3 AF18
SATALED*
40-B4 C354 4.7nF 25V AF3
SATA1_RXN0 SATA0RXN
C355 4.7nF 25V AE3
40-B4
SATA1_RXP0 SATA0RXP
C378 4.7nF 25V AG2
SATA1_TXN0 SATA0TXN
C379
40-B4 4.7nF 25V AH2
SATA1_TXP0 SATA0TXP
40-B4
AF7
SATA2RXN
AE7
SATA2RXP
AG6
SATA2TXN
AH6
SATA2TXP
AF1
CLK1_SATA* SATA_CLKN
AE1
7-B1
CLK1_SATA SATA_CLKP
7-B1
AH10
SATARBIASN
AG10
SATARBIASP
R927
40-C4 40-D1 AF15
IDE5_IOR* DIOR*
24.9 40-C2 40-C4 AH15
IDE5_IOW* DIOW*
1%
AF16
40-C1 40-C4
DDACK*
IDE5_DACK*
AH16
22-B3 40-C2 40-C4
IDE5_IRQ IDEIRQ
40-C2 40-C4 AG16
IDE5_IORDY IORDY
AE15
40-C4 40-D1
IDE5_DREQ DDREQ
2
Pull up
Pull down
55-C4 41-C3 23-C2 23-A4
AA6
0
LAD0
AB5 1
LAD1
AC4 2
LAD2
Y6 3
LAD3
AC3
LDRQ0*
AA5
LDRQ1*_GPIO23
AB3
LFRAME*
55-C4 41-C3 23-C2 23-A4
AE22
41-B3 22-A3
A20GATE
AH28 8-C3
A20M*
AG27
CPUSLP*
AF24 9-C4
TP1_DPRSTP*
AH25 9-C4
TP2_DPSLP*
AG26
FERR*
AG24 9-C4
GPIO49_CPUPWRGD
AG22
8-C3
IGNNE*
AG21 23-C4
INIT3_3V*
U18-1
AF22 8-C3
INIT*
AF25 8-C3
ICH7-M INTR
AG23
41-B3 22-A3
RCIN*
1 / 5
AH24
8-C3
NMI
AF23 8-C3
SMI*
AH22
8-B3
STPCLK*
AF26
THERMTRIP*
40-D2 40-D1 40-B4
AB15 0
DD0
AE14 1
DD1
SATA1_RXN0_C
AG13
2
DD2
SATA1_RXP0_C
AF13 3
DD3
SATA1_TXN0_C AD14 4
DD4
SATA1_TXP0_C AC13 5
DD5
AD12 6
DD6
AC12
7
DD7
AE12 8
DD8
AF12 9
DD9
AB13
10
DD10
AC14 11
DD11
AF14 12
DD12
AH13 13
DD13
AH14 14
DD14
AC15 15
DD15
AH17
DA0
AE17 40-C4 40-C2
DA1
AF17
40-C4 40-C2
DA2
40-C4 40-C1
AE16
DCS1*
AD16
40-C4 40-C2
DCS3*
40-C4 40-C1
2
1
D
LPC3_LAD(0:3)
LPC3_LFRAME*
VCCP
KBC3_A20G
CPU1_A20M*
R876
56.2
1%
CPU1_DPRSTP*
CPU1_DPSLP*
CPU1_FERR*
8-C3
CPU1_PWRGDCPU
CPU1_IGNNE*
FWH3_INIT*
CPU1_INIT* VCCP
CPU1_INTR
C
KBC3_CPURST*
R877
56.2
CPU1_NMI
1%
CPU1_SMI*
CPU1_STPCLK*
R880 24.9 1%
CPU1_THRMTRIP*
13-C4 11-A4 9-C4
IDE5_D(0:15)
**Note
Place 56 ohm resistor within 2" of ICH7-M
Place PU resistor within 2" of ICH7-M
IDE5_A0
B
IDE5_A1
IDE5_A2
IDE5_CS1*
IDE5_CS3*
A
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