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• IC PIN Descriptions
IC101 M30392MEP-A10FPU0 (SYSTEM CONTROL) (PANEL BOARD (2/2))
Pin No.
1
2
3
4
STANDBY LED
5
VIDEO OUT SW
6
VIDEO MUTE
7
8
9
10
11
12
13
14
15
16
17
18
ILLUMI 1/4
19
20
21
ILLUMI CTRL
22
DVD POWER
23
MTK RESET
TE
L 13942296513
24
MTK BUSY
25
26
27
28
29
30
31 to 43
44 to 51
52
53 to 61
62
63
64
65 to 67
68
69
70
71
72
I/O VCC CONT
73
74
WAKE UP0
75
76
77
www
78
79
80
ILLUMI 3/6
.
81
ILLUMI 2/5
PLAY SW (A) & (B)/
82
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Pin Name
I/O
61537 CLK
O
TA device control serial clock signal output
61530 CLK
O
TA device control serial clock signal output
TA DATA
O
TA device control serial data signal output
O
Standby LED control signal output
O
Video out switch control signal output "H": VIDEO
O
Video mute signal output "L": VIDEO
SIRCS
I
Remote control signal input
VACS2
I
VACS signal input
CN VSS
—
Connector ground pin
X CIN
I
Sub clock signal input (32.768 kHz)
X COUT
O
Sub clock signal output (32.768 kHz)
RESET
I
Reset signal input
XOUT
O
Main clock signal output (16 MHz)
VSS
—
Ground pin
X IN
I
Main clock signal input (16 MHz)
VCC1
—
Power supply pin (+3.3 V)
P85
I
Pull up (EVER+3.3 V)
O
Illumination on/off control signal output "H": On
ST TUNED
I
ST tuned signal input
AC CUT
I
AC cut signal input
O
Illumination control signal output
O
DVD power supply control signal output
O
MTK reset signal output
O
MTK busy signal output
I2C CLK
I/O
I2C serial clock signal input/output
I2C DATA
I/O
I2C serial data signal input/output
MTK OUT
O
MTK serial data signal output
MTK IN
I
MTK serial data signal input
MTK CLK
I
MTK serial clock signal input
MTK CS
I
MTK chip select signal input
G13 to G1
O
Grid and segment control signal output
P1 to P8
O
Grid and segment control signal output
VEE
—
Power supply pin
P9 to P17
O
Grid and segment control signal output
VCC2
—
Power supply pin (+3.3 V)
P18
O
Grid and segment control signal output
VSS
—
Ground pin
P19 to P21
O
Grid and segment control signal output
ST CE
O
Tuner chip enable signal output
ST DIN
I
Tuner data in signal input
ST DOUT
O
Tuner data out signal output
ST CLK
O
Tuner serial clock signal output
O
In/out power supply control signal output
I/O LATCH
O
In/out serial latch control signal output
I
Wake up signal input
I/O CLK
O
In/out serial clock control signal output
I/O DI1
O
In/out serial data control signal output
I/O RST
O
In/out reset signal output
TRG (B)
O
Tape mechanism logic (Trigger B) control signal output
x
ao
y
TRG (A)
O
Tape mechanism logic (Trigger A) control signal output
O
Illumination on/off control signal output "H": On
i
O
Illumination on/off control signal output "H": On
Head up switch detect signal input (A deck and B deck)
I
A-HALF
A deck HALF signal input
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8
Q Q
3
6 7
1 3
u163
.
2 9
9 4
2 8
Pin Description
1 5
0 5
8
2 9
9 4
m
co
HCD-GNZ5D
9 9
2 8
9 9
57
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