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QQ
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¶ Block Diagram
2 UARTs,
2
2 I
C-SSCs,
IR transceiver
MAFE interface
DVD
Ext peripherals:
flash, additional
DRAM SDRAM
TE
L 13942296513
16, 32, 64 or
128-Mbit
SDRAM
Analog/digital
Video output,
480i/480p
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Internal peripherals
Central
command port
Low power
mode
Front-end &
link interface
DMA
Communications
Programmable
CPU interface
(EMI)
I/F
Shared
SDRAM
interface (SMI)
OSD, SP
DENC
decoder
and mixing
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8
CPU
(C2+)
Clock
DMAs
generator
arbiter
ST20 arbiter and memory controller
SDRAM
CD FIFOs
block move
Q Q
3
6 7
1 3
SDRAM arbiter (LMC)
Audio &
Video
Video
Karaoke
filtering
decoder
.
DV-563A-S
7
9 4
2 8
Cache sub-system
RID
TAP
ICache
SRAM
Refill
control
DCache
Diagnostic
controller
CPU arbiter
Command I/F
1 5
0 5
8
2 9
9 4
m
co
7
8
9 9
A
B
JTAG
debugging
interface
C
2 8
9 9
Audio
D
in/out
E
F
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