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RDR-GXD500
Q Q
3 7 6 3 1 5 1 5 0
T E
L
1 3 9 4 2 2 9 6 5 1 3
w w w
x
a o
y
.
i
3-7
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3-4. OVERALL BLOCK DIAGRAM (4/4)
A-003 BOARD
IC100
EMMA2L
CN402(1/2)
105,107,
80
114,125,
FE DATA 0-7
127,138,
87
149,151
FE CLK
93
113
STPCLK
FE VALID
91
126 STPEN
FE PACKET SYNC
89
162 STPSTRT
FE RESET
95
183 PPORT11
SDA1
97
263 SDA1
SCL1
99
264 SCL1
60,158,
59
159,167,
VDO 0-7
DADD 0-12
656 D0-D7
168,175,
66
176,184
656 CLK
55
80
VCK
SCLO
51
244 SCL0
SDAO
53
223 SDA0
10
•
12
•
14
Q304
•
Y
16
68
270
VAG
•
Q311
18
Cb
72
272 VAB
Q312
Cr
70
227 VAR
DAC L
78
8
LO
DATA
1
218
ADO
BCKI 2
238 ABCK
DAC R
7
RO
LRCI 3
237 ALRCK
76
CLK 4
258 AMCK
IC300
Q
Q
3
7
6
AUDIO D/A CONV.
u 1 6 3
.
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2
4
8
9
9
CN402(2/2)
PPORT30
171
RXD1B
256
TXD1B
236
PMSDIO
201
PMSINS
212
PMSSCLK
220
PMSPON
221
PMSBS
241
15-18
35-38
DQ 0-15
DQ[0-15]
54-57
IC202
73-76
DDR SDRAM
5-9
DADD[0-12]
26-30
46-48
10-13
31-33
49-53
72
22,41,
43,193,
29-32
RDADT[0-7]
195,214,
41-44
IC206
234,253
NAND FLASH
254,216,
7-9
MEMORY
177,235,
16-18
87,137
19
CLK27IN
111
PWMOUT
257
3
AIN
27M
5
IC201
X1
X2
1
8
27MHz CLOCK GEN.
X200
27MHz
3.3V
3
1
5
1
5
0
8
9
2
Q309,310
226
2
OUT
CD
3
IC302
RESET
m
c o
3-8
2
8
9
9
AV-091 BOARD (3/3)
CN1002
CN1000(2/2)
TIG MODE
JIG MODE
16
16
5
RX
RX
15
15
4
TX
TX
14
14
3
PMSDIO
PMS SDIO
28
28
6
PMSINS
PMS INS
25
25
3
PMS SCLK
PMSSCLK
26
26
4
PMSPON
27
27
PMSBS
PMS BS
24
24
2
Q1001
3.3V
VCC
5
CN1001
Q1000
4
9
8
2
9
9
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