Ic Block Diagrams - Sony CDP-CA80ES Service Manual

5-12. IC BLOCK DIAGRAMS

QQ
3 7 63 1515 0
IC301 CXD8505BQ (MAIN BOARD (2/2))
SYSM 33
ATT 34
SHIFT
35
LATCH
36
XINT
37
XDCK
38
XLRCK 39
DATA1 40
VSUD(D)R 41
42
DF VSS
VSUB(D)L 43
44
INAF
512FS0 45
256FS0 46
128FS0 47
I NV1 48
I NV01
49
I NV02
50
MUTE R 51
TE
L 13942296513
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32 31
"O" DETECT
MUTE
CIRCUIT
MODE
ATT FIR1
S/P
ATT FIR1
TIMING
CIRCUIT
52 53 54 55 56 57 58 59 60
IC103 CXA2568M (BD BOARD)
APC PD AMP
VEE
1
HOLD
VEE
AGCVTH
2 VREF
LD 3
PD
4
A 5
B 6
C 7
D
8
VEE
9 VEE
VC
F 10
E
11
x ao
y
VC
i
VC BUFFER
VC 12
VC
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8
L. I. P.
FIR2
FIR3
(x 8)
IIR
AC, DC
DITHER
L. I. P.
FIR2
FIR3
(x 8)
IIR
Q Q
3 6 7 1 3
VCC
VCC
APC LD AMP
VC
VCC
VC
VEE
RF SUMMING AMP RF_EQ_AMP
VC VC
ERROR AMP
VC
FOCUS
VC
u163
TRACKING
VC
.
ERROR AMP
VCC
VC
VEE
— 39 —
2 9 9 4 2 8
30 29 28 27 26 25 24 23 22 21 20
PLM
3RD ORDER
NOISE
SHAPER
CLOCK
GENERATOR
3RD ORDER
NOISE
SHAPER
PLM
61 62 63 64
1 5 0 5 8 2 9 9 4
24 VCC
23
LC/PD
22 LD_ON
21 HOLD_SW
AGCCONT
20
(50%/30%
OFF)
RF_BOT
19
18 RFTC
17 RF_1
RFO
16
RFE
15
FE
14
m
co
13 TE
9 9
19
VSS2
18
R2(+)
17
VSS
16 R2( - )
15
VDD
14
VDD2
13
VSUB(A)R
12
XVSS
11
XVSS
10
X IN
9
X OUT
8
XVDD
7 VSUB(A)L
6
VDD2
5 VDD
4 L2(-)
3 VSS
2
L2(+)
1 VSS2
2 8 9 9