Yamaha DVX-S120 Service Manual page 75

A B
DVR-S120 SCHEMATIC DIAGRAM (DIGITAL)
1 Q Q
3 7 6 3 1 5 1 5 0
4M DRAM
5.0
0
0.1
0.9
0.1
0.2
0.1
0.7
0.1
0.1
5.0 0
2 0.1
1.0
0.1
1.1
0.1
1.1
0.1
0
2.2
3.1 2.2
1.8 2.0
~
1.1 ~
0 ~
1.7
~
0
5.0
3
X : NOT USED
0 11
0
13
12
EUROPE
0 8
12 0
9
4
T E
L 1 3 9 4 2 2 9 6 5 1 3
5
0
3.3
5.0
0
0
0
0 0
0 0
0 0 0
0
0 2.6
0
0
0 3.3 0
PLD
0
0 0
0 0
0 3.3 2.6
3.3 3.3
3.3
3.3 3.3
3.3
3.3 3.3
3.3
6
0
0
4.8
4.8
256K SRAM
0
4.8
0
3.3
4.8
0
7
IC371 : CY62256LL-70SNCT
Static RAM
A5 1 VCC
28
A6 2 WE
27
A7 A4
3 26
A8 A3
4 25
A9 5 24 A2
I/O0
A10 6 23 A1 INPUT BUFFER
w w w I/O1
A10
A11 7 22 OE
A9
I/O2
A12 8 21 A0
A8
A7
A13 9 20 CE I/O3
512 X 512
A6
8
A14 10 19 I/O7 A5
ARRAY
I/O4
A4
I/O0 11 18 I/O6 .
A3
I/O5
I/O1 12 17 I/O5 A2
I/O2 13 16 I/O4 I/O6
CE POWER
GND 14 15 I/O3 COLUMN
I/O7
DOWN
WE DECODER
OE
C D E
0.7
0.2
0
0.7
2.5 2.5
0
0
0
0
3.3
DSP
0
0 3.3
1.2
1.2
0
1.5
Point w (Pin 2 of IC379) 1.2
3.3
0
0
4.9
0
0.3
1.6
0.3
1.7
4.8
1.7
0
0
2
0
0
4.9 0
2.5
3.3
0
0
0
2.5 0
ANALOG IN
(DIGITAL)
3.3
3.3
0
0
1.7
1.6
DECODER
1.7
1.7
0 1.6
0
2.5
2.5
0
0
0
0 0
3.3
0 0
2.5
0 2.6 2.6
0
3.3 3.3
0
0
0
0
0
0
0
0
0
0
3.3
IC373 : CS493292-CLR
Audio Decoder
36 8 9 10 11 14 15 16 17 18 5 4
A0, SCCLK 7 39 AUDATA2 Parallel or Serial Host Interface
27
DATA7, EMAD7, GPIO7 8 38 DC Compressed
DATA6, EMAD6, GPIO6 9 37 DD 28 Data Input
Frame
DATA5, EMAD5, GPIO5 10 36 RESET Interface
29 Shifter 24-Bit
DATA4, EMAD4, GPIO4 11 35 AGND
DSP Processing
x a o
VD2 12 34 VA
Input RAM y RAM
DGND2 13 33 FILT1 Buffer
Program Data RAM Output
25
DATA3, EMAD3, GPIO3 14 32 FILT2 Digital Controller
Memory Memory Buffer
Audio
DATA2, EMAD2, GPIO2 15 31 CLKSEL
26
i Input RAM RAM
DATA1, EMAD1, GPIO1 16 30 CLKIN
Program Data
Interface
DATA0, EMAD0, GPIO0 17 29 CMPREQ, LRCLKN2 22
Memory Memory
RAM Input
Buffer STC
30
PLL
Clock Manager
31
32 33 34 35 24 13 2 23 12 1
http://www.xiaoyu163.com F G
Page 77 D1
to MAIN (1)
SUB CPU
VIDEO_L
(ANALOG IN)
11.7
8
0
1
0
7
4
-12.2
0
5.0 2.5 2.5
FRONT_L
0
5.0 2.5 2.5
0 8
3
Q Q
3 7 6 0 3
2
FRONT_L
CENTER
6
0
0 5
4
CENTER
8
0 0 3
0 2.5
0 2
2.5
CODEC
1.7
1.7
1.2
2.5
1.2 2.5
1.5
2.5
0
2.5
1.9
6
0 2.5 0
2.5 5
0 4
REAR_L
REAR_L
8
0 3
0 2
0
6
ANALOG IN
0
5
(DIGITAL) 4
8
0 3
0 2
14
2.5
1
3
4.8
2
7 0
0
6
0
5
4
IC378 : MSM514260E-60JS
4Mbit DRAM
WE
TIMING
VCC 1 40 VSS RAS
GENERATOR
DQ1 2 39 DQ16 I/O
CONTROLLER
DQ2 3 38 DQ15 LCAS
DQ3 4 37 DQ14
UCAS
19 7 6 20 21 I/O
DQ4 5 36 DQ13
CONTROLLER
VCC 6 35 VSS
37
DQ5 7 34 DQ12 COLUMN
COLUMN
38 9 9
DQ6 DQ11 ADDRESS DECODERS
8 33
BUFFERS
DQ7 9 32 DQ10
DQ8 10 31 DQ9
SENSE
44
NC 11 30 NC INTERNAL
u 1 6 3 REFRESH AMPLIFIERS
43 A0~A8 ADDRESS
CONTROL CLOCK
NC 12 29 LCAS
42 COUNTER
WE UCAS
Output 39 13 28
Formatter RAS 14 27 OE
40
.
41 NC 15 26 A8 ROW
ROW WORD MEMORY
9 ADDRESS 9
3 A0 16 25 A7 DECODERS DRIVERS CELLS
BUFFERS
A1 17 24 A6
A2 A5
18 23 VCC
A3 19 22 A4
ON CHIP
VCC 20 21 VSS
VBB GENERATOR
VSS
http://www.xiaoyu163.com
H I
Page 76 J2
2 4
8 9 9
to MAIN (2)
0 0
0 3.4
0
0
5.0
5.0
0
0
0
0
MAIN CPU
0
0.3
0
3 0
0.3
2
0
0 1
0
0
0 0
4.8
6
2.3
0 Point q (Pin 13 of IC381)
5 0
2.1
4.9
4.9
0
11.7
1 0
1 5 1 5 0 8 9 2
0 5.0
4.8
0
0
2.5
4.8
4.8
0
4.9
7 4.9
-12.2
0.1
0.1
4.8
11.7
1
0
0
0
4.8
7
0
-12.2 0
0
11.7
1
0
7
0
-12.2
11.7
1
0
7
0
-12.2
IC380 : AK4628VQ
192kHz 24bit 8ch CODEC
OE
L IN ADC HPF
R IN ADC HPF
OUTPUT
8 8
BUFFERS
L OUT1 LPF DAC DATT
SDOS 1 33 DZF2/OVF
I2C 2 32 RIN
DQ1~DQ8 R OUT1 LPF DAC DATT
SMUTE 3 31 LIN
BICK 4 30 NC
L OUT2 LPF DAC DATT
INPUT LRCK m TST2
8 8 5 29
BUFFERS
SDTI1 6 28 ROUT1 R OUT2
LPF DAC DATT
SDTI2 7 27 LOUT1
SDTI3 ROUT2
8 26 L OUT3 LPF DAC DATT
I/O SDTO 9 25 LOUT2
16 16 D AUX 10 24 ROUT3
SELECTOR c o R OUT3 LPF DAC DATT
DFS 11 23 LOUT3
L OUT4 LPF DAC DATT
INPUT R OUT4 LPF DAC DATT
8 8
BUFFERS
DQ9~DQ16
OUTPUT
8 8
BUFFERS
J K
DVR-S120/NX-P120
Page 78 F1
2
8 9 9
to FL
IC374 : TC74HCT08AF
Quad 2 Input AND
A1 1 14 V
DD
B1 2 13 B4
Y1 3 12 A4
A2 4 11 Y4
B2 5 10 B3
Y2 6 9 A3
V 7 8 Y3
SS
IC375–377, 384, 385 :
µPC4570G2
Dual OP-Amp
OUT 1 8 +V
1 CC
–IN 2 7 OUT
1 2
+ – + –
+IN 1 3 6 –IN 2
–V 4 5 +IN
CC 2
0
0
0
4.9
4.6
0
5.0
0
4.9
4.9
4.8
4.8
0
0
0
0
4.8
4.8
4 9 0 8 2 9 9
0.1
0
0
5.0
0
0
0
0
5.1
0
AUDIO
I/F
MCLK MCLK
LRCK LRCK
BICK BICK
DAUX
FORMAT
CONVERTER
SDOUT
SDOS
SDTO
SDIN1 SDTI1
SDIN2 SDTI2
SDIN3 SDTI3
SDIN4 SDTI4
* All voltages are measured with a 10M Ω /V DC
electronic volt meter.
* Components having special characteristics are
marked Z and must be replaced with parts
having specifications equal to those originally
installed.
* Schematic diagram is subject to change without
notice.
75