DSP : 320VC5402PGE (TX-RX unit IC618)
■ Pin Function
Pin No.
Name
I/O
1,2
NC1,NC2
–
3
Vss
–
4
DVDD
–
5
A0
O
6
HD0
I/O
7~11
A1~A5
O
12
NC3
–
13
HAS
I
14
Vss
–
15
NC4
–
16
CVDD
–
17
HCS
I
18
HR/W
I
19
READY
I
20
PS
O
21
DS
O
22
IS
O
23
R/W
O
24
MSTRB
O
25
IOSTRB
O
26
MSC
O
27
XF
O
28
HOLDA
–
29
IAQ
–
30
HOLD
I
31
BIO
I
32
MP/MC
I
33
DVDD
–
34
Vss
–
35~38
NC5~NC8
–
39
HCNTL0
I
40
Vss
–
41
BCLKR0
I
42
BCLKR1
–
43
BFSR0
I
44
BFSR1
I
SEMICONDUCTOR DATA
Function
Not used (No connection)
GND
VDD for I/O pins (+3.3V)
Not used (No connection)
HPI data bus
Not used (No connection)
Not used (No connection)
HPI address strobe (Pull up)
GND
Not used (No connection)
VDD for core CPU (+1.8V)
HPI chip select
HPI read/write
Data ready (Pull up)
Not used (No connection)
Not used (No connection)
Not used (No connection)
Not used (No connection)
Not used (No connection)
Not used (No connection)
Not used (No connection)
CODEC control
H : Power down, L : Active
Not used (No connection)
Not used (No connection)
Hold (Pull up)
Serial data syncronize input
Not used (Pull down)
VDD for I/O pins (+3.3V)
GND
Not used (No connection)
HPI control 0
GND
Receive clock input
(SCLK : 516.09375kHz)
Not used (No connection)
Frame sync. for receiver input
(LRCK : 16.128kHz)
Frame sync. for receiver input
(LRCK : 16.128kHz)
Pin No.
Name
I/O
45
BDR0
I
Serial data receive input
46
HCNTL1
I
HPI control 1
47
BDR1
–
Not used (No connection)
48
BCLKX0
I
Transmit clock input
(SCLK : 516.09375kHz)
49
BCLKX1
O
Master clock output
(MCLK : 4.12875MHz)
50
Vss
–
GND
51
HINT/TOUT1
O
Boot mode select (Pull up)
52
CVDD
–
VDD for core CPU (+1.8V)
53
BFSX0
I
Frame sync. for transmitter input
(LRCK : 16.128kHz)
54
BFSX1
I
Frame sync. for transmitter input
(LRCK : 16.128kHz)
55
HRDY
–
Not used (No connection)
56
DVDD
–
VDD for I/O pins (+3.3V)
57
Vss
–
GND
58
HD1
I/O
HPI data bus
59
BDX0
O
Serial data transmit output
60
BDX1
–
Not used (No connection)
61
IACK
–
Not used (No connection)
62
HBIL
I
Byte identification (HPI)
63
NMI
I
Not used (Pull up)
64
INT0
I
Command interrupt from host CPU
65
INT1
I
Not used (Pull up)
66
INT2
I
Boot mode select (Pull up)
67
INT3
I
Not used (Pull up)
68
CVDD
–
VDD for core CPU (+1.8V)
69
HD2
I/O
HPI data bus
70
Vss
–
GND
71~74
NC9~NC12
–
Not used (No connection)
75
DVDD
–
VDD for I/O pins (+3.3V)
76
Vss
–
GND
77
CLKMD1
I
Clock mode select (Pull down)
78
CLKMD2
I
Clock mode select (Pull up)
79
CLKMD3
I
Clock mode select (Pull down)
80
NC13
–
Not used (No connection)
81
HD3
I/O
HPI data bus
82
TOUT0
–
Not used (No connection)
83
EMU0
I/O
Emulator 0 (to JTAG connector)
TKR-850
Function
19