Related Manuals for Cherry Theobroma Systems PUMA SOM-RK3399-Q7
Summary of Contents for Cherry Theobroma Systems PUMA SOM-RK3399-Q7
- Page 1 USER MANUAL PUMA SOM-RK3399-Q7 Powerful System-on-Module for vertasile application featuring the Rockchip RK3399 application processor Document revision: v1.7 Issue date: Feb 15, 2024...
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Page 3: Table Of Contents
Contents 1 Introduction Device Overview ..........2 First Steps Required Tools . - Page 4 6 Contact 7 Revision History v1.7 Page ii...
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Page 5: Introduction
1 Introduction Congratulations for acquiring our new flagship product, combining best-in-class performance with a rich set of peripherals. Note: The latest version of this manual and related resources can always be found on our website at the following address: https://www.theobroma-systems.com/product/puma-som-rk3399-q7/ 1.1 Device Overview The RK3399 is a low power, high performance processor for computing, personal mobile internet devices and other smart device applications. -
Page 6: First Steps
2 First Steps This chapter provides instructions for getting the RK3399-Q7 EVK running after opening the box. 2.1 Required Tools • PZ1 (Pozidriv) screwdriver 2.2 Insert the Module Insert the RK3399-Q7 module at a 30-degree angle into the connector in the base board. Once fully inserted , push it down until it rests on the standoffs and check alignment of the mounting holes. -
Page 7: Mount The Fan (Optional)
Push the module down flat and place the heatsink spacer on the module with the smooth side facing up. Make sure the orien- tation is correct by checking alignment of the mounting holes. Place the heatsink on the spacer and screw it down gently using the four included M2.5 screws. - Page 8 HDMI USB UART Power RS232 v1.7 Page 4...
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Page 9: Using The Evk
3 Using the EVK This chapter provides instructions for using the EVK, such as booting and how to configure and use I/O peripherals (e.g. serial console, Ethernet). 3.1 Evaluation Board Overview An overview of the available connectors and devices on the EVK is shown below. Buzzer Battery CTRL I/O... -
Page 10: Power Supply
3.2 Power Supply The baseboard can operate with a single 12V DC power supply. Fig. 3.2: 12V Power connector Power can be controlled manually from the board using the Power control buttons and switches, located on the lower right side of the board (see Evaluation Board Overview). Depending on the setting of Normally On / Normally Off switch the board will boot as soon as it receives power. -
Page 11: Boot Order
Fig. 3.3: Fan connector Note: The fan is only necessary in high ambient temperatures. Under normal conditions, the RK3399-Q7 operates passively cooled. 3.5 Boot Order The used boot order of the RK3399-Q7 module depends on the value of the BIOS_DISABLE# signal. On the Haikou baseboard, this signal can be set using a slider switch, with the two positions labeled Normal Boot, and BIOS Disable. -
Page 12: Usb Serial Console
3.6 USB Serial Console The evaluation board contains an on-board Silicon Labs CP2102N USB-serial converter. Connect the included Micro-USB cable to the Micro-USB jack labeled USB-UART Bridge : Fig. 3.4: USB UART The serial converter does not require additional drivers on Windows and Linux. For Mac OS, drivers are available from Silicon Labs: http://www.silabs.com/products/development-tools/software/ usb-to-uart-bridge-vcp-drivers The Q7 modules has two external UARTs:... -
Page 13: Rs-232 And Rs-485
3.7 RS-232 and RS-485 To connect via RS-232 or RS-485, connect to the RS232 / RS485 jack on the base board. UART1 UART0 RS232/ Full/Half Duplex RS485 Fig. 3.5: RS-232 connector The switch labeled RS-232 / RS-485 selects between RS-232 and RS-485 mode on the jack. In RS-485 mode, the switch labeled Full Duplex / Half Duplex selects full- or half-duplex mode, respectively. -
Page 14: Usb Interfaces
3.10 USB Interfaces The RK3399-Q7 provides four USB ports: • 1x USB 3.0 OTG • 2x USB 3.0 Host • 1x USB 2.0 Host Fig. 3.7: USB 3.0 OTG port (dual-role port: can be used as a host or device interface) Fig. -
Page 15: Video
3.10.1 Connecting an External USB Drive To connect a USB drive, plug it into one of the USB ports. The system should recognize the drive immediately. Check the kernel log to find the device name: journalctl -k You will be able to mount its partitions (assuming mapping to /dev/sdb1 ): mkdir /mnt/usb1 mount /dev/sdb1 /mnt/usb1 ls /mnt/usb1... -
Page 16: Rtc
Qseven Port Function Alternate Function LVDS A MIPI-DSI LVDS B MIPI-DSI MIPI-CSI LVDS_B_CLK_N LVDS_A3_N LVDS_B_CLK_P LVDS_A3_P LVDS_B3_N LVDS_B3_P LVDS_A2_N LVDS_A2_P LVDS_B2_N LVDS_B2_P LVDS_A1_N LVDS_A1_P LVDS_B1_N LVDS_B1_P LVDS_A0_N DP_HPD# LVDS_A0_P LVDS_B0_N LVDS_A_CLK_N LVDS_B0_P LVDS_A_CLK_P LVDS_PPEN LVDS_BLC_DAT LVDS_BLC_CLK LVDS_BLT_CTRL LVDS_BLEN LVDS_DID_DAT GPO0 LVDS_DID_CLK Fig. -
Page 17: Spi, I2C And 1-Wire
You can also update the RTC immediately, again with hwclock : hwclock -v You can set up an NTP client so the time will always be updated from the Internet. Install the client first: apt-get install ntp Feel free to change the /etc/ntp.conf file to use more local time sources (change servers from pool.ntp.org to use a server from your country, such as at.pool.ntp.org ). -
Page 18: Gpios
3.13.2 SMBus The board provides communication through SMBus. It is basically like I2C with an additional line for interrupt and is used for connecting sensors and power peripherals. Fig. 3.14: SMBUS header 3.13.3 Linux Bus Numbering Linux identifies each I2C bus using a bus number. The table below shows the mapping between Q7 names, Linux bus number and EVK header. - Page 19 Fig. 3.15: GPIO header The GPIO numbers printed on the board refer to numbers used in the Qseven specification. They are different than the ones used in Linux via /sys/class/gpio. The mapping is shown in the following table: Qseven signal CPU pin Linux GPIO # GPIO0...
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Page 20: Audio
echo out > /sys/class/gpio/gpio156/direction echo > /sys/class/gpio/gpio156/value The GPIO will be set to a value of 1 (high at 3.3V). 3.15 Audio The board provides two audio connectors for input and output. Line-in is on top and Headphones is on bottom of the audio connector. -
Page 21: Ctrl I/O Connector
Fig. 3.18: CAN header 3.17 CTRL I/O Connector The board provides signals for watchdog trigger in- and output, SoM PMIC power-on input, reset and external display power enable. Fig. 3.19: CTRL I/O header PUMA RK3399-Q7 User Manual v1.7 © Theobroma Systems Design und Consulting GmbH Page 17... -
Page 22: Misc Connector
3.18 MISC Connector The board provides signals for thermal overheat of external hardware and the processor, utility signals for SD and GPIO0. Fig. 3.20: MISC header v1.7 Page 18... -
Page 23: Software Guide
4 Software Guide This chapter provides instructions for compiling and deploying the BSP (Board Support Package) software to the Q7 module. 4.1 Architecture Overview The BSP consists of several parts. They run on different parts of the CPU and each play their role in the boot process. Because the CPU contains cores running different instruction sets (ARMv6-M and ARMv8-A), two different compilers are needed. -
Page 24: Compile The Cortex-M0 Power Management Firmware
4.2.2 ARMv8-A Compiler The Linaro aarch64-linux-gnu toolchain is suitable for compiling all other parts of the BSP. It is also suitable for compiling user- space applications. You can download ready-to-use binaries from Linaro: https://releases.linaro.org/components/toolchain/ binaries/6.3-2017.02/aarch64-linux-gnu/ . Direct link to the file: https://releases.linaro.org/components/toolchain/binaries/6.3-2017.02/aarch64-linux-gnu/gcc-linaro-6.3.1-2017.02-x86_ 64_aarch64-linux-gnu.tar.xz Extract the tar.xz archive to /opt:... -
Page 25: Compile U-Boot
4.5 Compile U-Boot U-Boot is used as the bootloader on the RK3399-Q7 module. Download the source code using: git clone https://git.theobroma-systems.com/puma-u-boot.git The U-Boot build process uses the files generated in the previous steps Copy the previously generated files rk3399m0.bin from the Cortex-M0 firmware and bl31.bin from the ATF to the puma-u-boot directory. Recent U-Boot releases expect the bl31.bin file under the name bl31-rk3399.bin . -
Page 26: Building The Root Filesystem
This will create the two files needed for booting with U-Boot (paths are relative to the puma-linux directory): • The device tree: arch/arm64/boot/dts/rockchip/rk3399-puma.dtb • The kernel image: arch/arm64/boot/Image 4.8 Building the root filesystem A filesystem can be created using Debootstrap, specifying arm64 as architecture in the command line. Supposing the target dir is called rk3399-rootfs and the chosen distribution is Debian 9 “Stretch”... -
Page 27: Deploy On Sd Card
<< > /etc/systemd/network/eth0.network [Match] Name=eth0 [Network] DHCP=yes systemctl enable systemd-networkd systemctl enable systemd-resolved ln -f -s /lib/systemd/resolv.conf /etc/resolv.conf When executing systemctl enable you may get the message qemu: Unsupported syscall: 278 . The operation still succeeds and the message can be safely ignored. Set the hostname and exit from the chroot: echo rk3399-q7 >... - Page 28 > Partition type: primary primary, extended, free) extended Select (default p): <ENTER> Partition number (1-4, default 1): <ENTER> First sector (2048-7774207, default 2048): 4096 Last sector, +sectors +size{K,M,G} (...): <ENTER> This will create a primary partition at offset 2MiB. Enter w to write the new partition table to the disk: >...
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Page 29: Deploy On Spi Nor-Flash
4.9.4 U-Boot Customization The boot script /boot/boot.scr handles the boot sequence. Unless you want to customize the sequence, no further action is required. If you want to step through the sequence manually or customize it, you can execute the following commands on the U-Boot prompt: setenv bootargs root=/dev/mmcblk0p1 rw rootwait ext4load mmc 1:1 $kernel_addr_r boot/puma_rk3399/Image... -
Page 30: Deploy On On-Board Emmc Storage
4.11 Deploy on On-Board eMMC storage As the eMMC storage is only accessible from the module itself, you must first boot the RK3399-Q7 from SD card. Partition and format the eMMC storage as described in Partition Setup, but using the device /dev/mmcblk1 . Mount the eMMC partition and copy the contents of the SD card to the eMMC storage. - Page 31 setenv ethaddr XX:XX:XX:XX:XX:XX saveenv The MAC address can be queried from the U-Boot prompt using: printenv ethaddr To reset the MAC address to the default value, run: env delete ethaddr saveenv PUMA RK3399-Q7 User Manual v1.7 © Theobroma Systems Design und Consulting GmbH Page 27...
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Page 32: Hardware Guide
5 Hardware Guide This Hardware Guide provides information about the features, connectors and signals available on the RK3399-Q7 module. 5.1 Qseven Implementation Qseven has mandatory and optional features. Following table shows the feature set of the RK3399-Q7 module compared to the minimum ARM/RISC based and maximum configuration according to the Q7 standard. -
Page 33: Q7 Connector Pinout
5.2 Q7 Connector Pinout The following table shows the signals on the edge connector of the RK3399-Q7 module. Empty cells are not connected (NC) pins. Signal Signal GBE_MDI3- GBE_MDI2- GBE_MDI3+ GBE_MDI2+ GBE_LINK100# GBE_LINK1000# GBE_MDI1- GBE_MDIO0- GBE_MDI1+ GBE_MDIO0+ GBE_LINK# GBE_ACT# SUS_S5# WAKE# SUS_S3# PWRBTN#... - Page 34 Table 5.1 – continued from previous page Signal Signal LVDS_A1- LVDS_B1- LVDS_A2+ LVDS_B2+ LVDS_A2- LVDS_B2- LVDS_PPEN LVDS_BLEN LVDS_A3+ LVDS_B3+ LVDS_A3- LVDS_B3- LVDS_A_CLK+ LVDS_B_CLK+ LVDS_A_CLK- LVDS_B_CLK- LVDS_BLT_CTRL / GP_PWM_OUT0 GP_1-Wire_Bus GP2_I2C_DAT / LVDS_DID_DAT LVDS_BLC_DAT / eDP0_HPD# GP2_I2C_CLK / LVDS_DID_CLK LVDS_BLC_CLK CAN0_TX CAN0_RX TMDS_CLK+ USB_SSTX1-...
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Page 35: Mipi-Csi Feature Interface Pinout
Table 5.1 – continued from previous page Signal Signal 5.3 MIPI-CSI Feature Interface Pinout The following table shows the signals on the MIPI-CSI feature interface connector. On the SoM a FCI 62684-36210E9ALF connector with top-side contacts is used. Empty cells are not connected (NC) pins. CAM_PWR CAM_PWR CAM0_CSI_D0+... -
Page 36: Signal Details
5.4 Signal Details 5.4.1 Ethernet Signal Type Signal Description Level GBE_MDI[0:3]+ Analog Gigabit Ethernet Controller: Media Dependent Interface Differential GBE_MDI[0:3]- Pairs 0,1,2,3. The MDI can operate in 1000, 100 and 10 Mbit/sec modes GBE_ACT# 3.3V Gigabit Ethernet Controller activity indicator, active low GBE_LINK# 3.3V Gigabit Ethernet Controller link indicator, active low... - Page 37 5.4.4 I2C Signal Type Signal Description Level Q7_I2C_CLK 3.3V I2C bus clock line connected to RK3399 Q7_I2C_DAT 3.3V I2C bus data line connected to RK3399 LVDS_DID_CLK 3.3V I2C bus clock line connected to RK3399 /GP2_I2C_CLK LVDS_DID_DAT 3.3V I2C bus data line connected to RK3399 /GP2_I2C_DAT SMB_CLK 3.3V...
- Page 38 Q7 Pin Function Alternate Function LVDS_A0_P MIPI_TX0_D0P EDP_TX0_P LVDS_A0_N MIPI_TX0_D0N EDP_TX0_N LVDS_A1_P MIPI_TX0_D1P EDP_TX1_P LVDS_A1_N MIPI_TX0_D1N EDP_TX1_N LVDS_A2_P MIPI_TX0_D2P EDP_TX2_P LVDS_A2_N MIPI_TX0_D2N EDP_TX2_N LVDS_A3_P MIPI_TX0_D3P EDP_TX3_P LVDS_A3_N MIPI_TX0_D3N EDP_TX3_N LVDS_A_CLK_P MIPI_TX0_CLKP EDP_AUX_P LVDS_A_CLK_N MIPI_TX0_CLKN EDP_AUX_N LVDS_B0_P MIPI_TX1/RX1_D0P LVDS_B0_N MIPI_TX1/RX1_D0N LVDS_B1_P MIPI_TX1/RX1_D1P LVDS_B1_N MIPI_TX1/RX1_D1N...
- Page 39 5.4.8 GPIO Signal Type Signal Description Level GPIO[0-7] 3.3V General purpose inputs/outputs 0 to 7 5.4.9 CAN Signal Type Signal Description Level CAN0_TX 3.3V CAN (Controller Area Network) TX output for CAN Bus channel 0 CAN0_RX 3.3V CAN (Controller Area Network) RX input for CAN Bus channel 0 5.4.10 SPI Signal Type...
- Page 40 5.4.12 Misc Signal Type Signal Description Level WDTRIG# 3.3V Watchdog trigger signal WDOUT 3.3V Watchdog event indicator SMB_CLK 3.3V Clock line of System Management Bus. Alternate function I2C Bus clock GP1_I2C_CLK line SMB_DAT 3.3V Data line of System Management Bus. Alternate function I2C Bus data GP1_I2C_DAT line SMB_ALERT#...
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Page 41: On-Board Devices
5.5 On-board Devices 5.5.1 Power-Manager The Rockchip RK808 is connected to the CPU via RSB and an interrupt line: RK808 Pin Function CPU Pin I2C0_SCL_u (ball N30) I2C0_SDA_u (ball M26) GPIO1_C6 (ball L25) 5.5.2 DDR3 • 4GB RAM of DDR3-1600 (2 independent channels, each 32-bit wide) 5.5.3 eMMC •... - Page 42 5.5.6 Ethernet PHY The Micrel KSZ9031RNX is connected to the CPU via RGMII and MDIO. Further connections are shown below. PHY signal Connected to Linux GPIO # RESET CPU pin GPIO3_C0 MDIO CPU pin GPIO3_B5 CPU pin GPIO3_B0 LED1 Qseven GBE_LINK1000 and GBE_LINK100 and GBE_LINK (tied together) LED2 Qseven GBE_ACT 5.5.7 Test points...
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Page 43: Usb
5.6 USB The RK3399 CPU has two USB 3.0 SuperSpeed controllers. A USB 3.0 hub provides two additional USB 3.0 super-speed ports. The routing of Qseven signals to CPU and/or hub port is shown below. The Linux Port # column shows the identifier that is used in Linux dmesg output. -
Page 44: Using Qseven Signals As Gpio
5.7 Using Qseven Signals as GPIO Most Qseven signals can be reused as general purpose pin. Following table shows the mapping and the possible direction between the edge connector and the SoC. Qseven Signal CPU Pin Linux Direction GPIO SUS_S5# GPIO1_A1 Output WAKE#... - Page 45 Table 5.3 – continued from previous page Qseven Signal CPU Pin Linux Direction GPIO GPIO6 GPIO4_C3 Bidirectional GPIO7 GPIO4_D3 Bidirectional SPI_MOSI GPIO2_C5 Output SPI_CS0# GPIO2_C7 Output SPI_MISO GPIO2_C4 Input SPI_CS1# GPIO2_D0 Output SPI_SCK GPIO2_C6 Output CAM0_RST# GPIO3_D4 Bidirectional CAM0_I2C_CLK GPIO2_B2 Bidirectional CAM0_I2C_DAT GPIO2_B1...
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Page 46: Electrical Specification
5.8 Electrical Specification 5.8.1 Power Supply The power supply requirements are listed in the table below and are identical to the Qseven specification. Rail Description Nominal voltage Tolerance Main power supply 4.75 . . . 5.25V VCC_RTC Backup battery 2.4 . . . 3.3V v1.7 Page 42... -
Page 47: Mechanical Specification
5.9 Mechanical Specification 5.9.1 Module Dimensions The mechanical dimensions of the module are shown below. Fig. 5.1: Module dimensions (all values in mm) 5.9.2 Baseboard Dimensions The mechanical dimensions of the baseboard are conform with the form factor for Mini-ITX and it can be mounted in a standard Mini-ITX PC Case. - Page 48 6 Contact Theobroma Systems Design und Consulting GmbH Seestadtstraße 27 1220 Vienna Austria Inquiries: sales@theobroma-systems.com Technical Support: support@theobroma-systems.com v1.7 Page 44...
- Page 49 7 Revision History Date Revision Changes Feb 15, 2024 v1.7 added contact section Dec 18, 2023 v1.6 recalled version Oct 25, 2021 v1.5 Add missing picture for CTRL I/O header Add pin description of CSI feature connector Apr 11, 2018 v1.4 Add heatsink spacer instructions Clarify U-Boot deployment on SD card...