3.3 DIRECT INPUT/OUTPUT COMMUNICATIONS
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Flashing yellow — internal mode while receiving a valid data packet
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Solid red — (switch to) internal timing mode while not receiving a valid data packet
The link/activity LED status is as follows:
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Flashing green — FPGA is receiving a valid data packet
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Solid yellow — FPGA is receiving a "yellow bit" and remains yellow for each "yellow bit"
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Solid red — FPGA is not receiving a valid packet or the packet received is invalid
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D30 Line Distance Protection System
3 HARDWARE
GE Multilin