Table 1-8. Internal Sram Memory Section Mapping; Table 1-9. Boot Rom Memory Section Mapping; Table 1-7. Sdram Memory Section Mapping - Sharp LH79524 User Manual

Overview
0x20000000 - 0x2FFFFFFF
0x30000000 - 0x3FFFFFFF
NOTE: *Also accessible at 0x00000000 when REMAP = 01.
0x60000000 - 0x60003FFF
0x60004000 - 0x7FFFFFFF
NOTES:
1. Also accessible at 0x00000000 when REMAP = 10
2. An access to this area is mapped to the lower 16KB and will not cause a memory abort
NOTE: *An access to this area will cause a memory abort.
If, following system reset, the boot configuration is set to 0bX1XX, an override of nCS1
occurs. In this circumstance, the Boot ROM is selected for the locations in the memory
map where nCS1 is normally selected. This causes the CPU to execute the predefined
code contained in the Boot ROM, allowing booting from NAND Flash, UART, or I
Table 1-10. This override can be disabled by writing a 0 to the nCS1 Override bit
(CS1OV:CS1O) in the Boot Controller. The override can be re-enabled by writing a 1 to
CS1OV:CS1O. If on system reset the boot configuration is set to 0bX0XX, nCS1 remains
mapped as described above and CS1OV:CS1O has no effect on the memory map.
1-14

Table 1-7. SDRAM Memory Section Mapping

START ADDRESS
REMAP = 'XX'

Table 1-8. Internal SRAM Memory Section Mapping

START ADDRESS
REMAP = 'XX'

Table 1-9. Boot ROM Memory Section Mapping

START ADDRESS
REMAP = 'XX'
0x80000000 - 0x80001FFF
0x80002000 - 0x9FFFFFFF
Version 1.0
LH79524/LH79525 User's Guide
DEVICE
Chip Select 0
Chip Select 1
DESCRIPTION
16 KB Internal SRAM
Internal SRAM (mirrored)
DESCRIPTION
8 KB Boot ROM
Invalid Access*
PIN
nDCS0*
nDCS1
NOTES
1
2
2
C; see