Yamaha MD4S Service Manual page 13

Multitrack md recorder
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MD4S
Q Q
3 7 6 3 1 5 1 5 0
LSI PIN DESCRIPTION
HD6413002F16 (XP691A00) CPU MAIN IC109
PIN
NAME
I/O
FUNCTION
NO.
1
VCC
Power supply (+5 V)
2
PB0
I/O
3
PB1
I/O
4
PB2
I/O
Port B
5
PB3
I/O
6
PB4
I/O
7
PB5
I/O
8
I
PB6//DREQ0
Port B/DMA request
9
I
PB7//DREQ1
10
/RES0
O
Reset output
11
VSS
Ground
12
P90/TXD0
O
Port 9/Transmission data
13
P91/TXD1
O
14
P92/RXD0
I
Port 9/Reception data
15
P93/RXD1
I
16
P94/SCK0
I/O
Port 9/Serial clock
17
P95/SCK1
I/O
18
P40/D0
I/O
19
P41/D1
I/O
20
P42/D2
I/O
21
P43/D3
I/O
22
VSS
Port 4/Data bus
(Ground)
23
P44/D4
I/O
24
P45/D5
I/O
25
P46/D6
I/O
26
P47/D7
I/O
27
D8
I/O
28
D9
I/O
29
D10
I/O
30
D11
I/O
Data bus
31
D12
I/O
32
D13
I/O
T E
L
1 3 9 4 2 2 9 6 5 1 3
33
D14
I/O
34
D15
I/O
35
VCC
Power supply (+5 V)
36
A0
O
37
A1
O
38
A2
O
39
A3
O
40
A4
O
41
A5
O
42
A6
O
43
A7
O
Address bus
44
VSS
(Ground)
45
A8
O
46
A9
O
47
A10
O
48
A11
O
49
A12
O
50
A13
O
w w w
13
PIN
NAME
I/O
FUNCTION
NO.
51
A14
O
52
A15
O
53
A16
O
Address bus
54
A17
O
55
A18
O
56
A19
O
57
VSS
Ground
58
I
Port 6 /Wait
P60//WAIT
59
I
Port 6/Bus request
P61//BREQ
60
P62//BACK
O
Port 6/Bus acknowledge
61
Ø
O
System clock
62
/STBY
I
Stand-by mode signal
63
/RES
I
Reset
64
NMI
I
Non-maskable interrupt
65
VSS
Ground
66
EXTAL
I
Crystal oscillator
67
XTAL
I
Crystal oscillator
68
VCC
Power supply (+5 V)
69
/AS
O
Address strobe
70
/RD
O
Read strobe
71
/HWR
O
High write
72
/LWR
O
Low write
73
MD0
I
74
MD1
I
Mode select (mode 1 – 4)
75
MD2
I
76
AVCC
Power supply for ADC
77
VREF
I
Reference voltage for ADC
78
P70/AN0
I
79
P71/AN1
I
80
P72/AN2
I
81
P73/AN3
I
Port 7/Analog input
82
P74/AN4
I
83
P75/AN5
I
84
P76/AN6
I
85
P77/AN7
I
86
AVSS
Ground for ADC
87
P80//RFRSH
Port 8/Refresh
88
P81//CS3
O
89
P82//CS2
O
Port 8/Chip select
90
P83//CS1
O
91
P84//CS0
O
92
VSS
Ground
93
PA0
I/O
94
PA1
I/O
95
PA2
I/O
96
PA3
I/O
Port A
97
PA4
I/O
98
PA5
I/O
99
PA6
I/O
100
PA7
I/O
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8
CXD2538R (XU964A00) ATRAC MAIN IC203
PIN
NAME
I/O
NO.
1
VDD1
Power supply
2
ACDI0
I
ATRAC data input 0
3
XABS0
I
ATRAC data serial transfer synchronization pulse input 0
4
C2PO0
I
ATRAC data error flag 0
5
XARQ0
O
ATRAC data transfer demand 0
6
ACDO0
O
ATRAC data output 0
7
SYNC0
I
Signal input 0 for ATRAC data synchronized
8
ACDI1
I
ATRAC data input 1
9
XABS1
I
ATRAC data serial transfer synchronization pulse input 1
10
C2PO1
I
ATRAC data error flag 1
11
XARQ1
O
ATRAC data forward demand 1
12
ACDO1
O
ATRAC data output 1
13
SYNC1
I
Signal input 1 for ATRAC data synchronized
14
F86IA
I
Frame synchronized signal input A
15
F86OA
O
Frame synchronized signal output A
16
F86IB
I
Frame synchronized signal input B
17
F86OB
O
Frame synchronized signal output B
18
ACDI2
I
ATRAC data input 2
19
XABS2
I
ATRAC data serial transfer synchronization pulse input 2
20
C2PO2
I
ATRAC data error flag 2
21
XARQ2
O
ATRAC data f transfer demand 2
22
ACDO2
O
ATRAC data output 2
23
SYNC2
Signal input 2 for ATRAC data synchronized
24
ACDI3
I
ATRAC data input 3
25
XABS3
I
ATRAC data serial forward synchronization pulse input 3
26
C2PO3
I
ATRAC data error flag 3
27
XARQ3
O
ATRAC data transfer demand 3
28
ACDO3
O
ATRAC data output 3
29
SYNC3
I
Signal input 3 for ATRAC data synchronized
30
VSS1
Ground
31
TEST0
I
Test terminal
Q
Q
32
TEST1
I
Test terminal
3
7
6
3
33
TEST2
I
Test terminal
34
EXEC0
I
Start / Stop establishment input 0 ("H"=START)
35
EXEC1
I
Start / Stop establishment input 1 ("H"=START)
36
EXEC2
I
Start / Stop establishment input 2 ("H"=START)
37
EXEC3
I
Start / Stop establishment input 3 ("H"=START)
38
ATT0
I
Attenuation establishment input 0 ("H"=-12dB)
39
ATT1
I
Attenuation establishment input 1 ("H"=-12dB)
40
ATT2
I
Attenuation establishment input 2 ("H"=-12dB)
41
ATT3
I
Attenuation establishment input 3 ("H"=-12dB)
42
MUTE0
I
Mute establishment input 0 ("H"=mute on)
43
MUTE1
I
Mute establishment input 1 ("H"=mute on)
44
MUTE2
I
Mute establishment input 2 ("H"=mute on)
45
MUTE3
I
Mute establishment input 3 ("H"=mute on)
46
REC0
I
REC/PLAY establishment input 0 ("H"=REC)
47
REC1
I
REC/PLAY establishment input 1 ("H"=REC)
48
REC2
I
REC/PLAY establishment input 2 ("H"=REC)
49
REC3
I
REC/PLAY establishment input 3 ("H"=REC)
50
XLAT0
I
Latch pulse input 0 of serial interface
51
XLAT1
I
Latch pulse input 1 of serial interface
52
XLAT2
I
Latch pulse input 2 of serial interface
53
XLAT3
I
Latch pulse input 3 of serial interface
54
XRSTA
I
Reset input A
55
XRSTB
I
Reset input B
56
SCLK
I
Transfer clock input of serial interface
57
SWDT
I
Data input of serial interface
58
TA0
I
Test terminal (Connect it with the ground.)
59
TA1
I
Test terminal (Connect it with the ground.)
60
VSS2
Ground
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2
4
9
9
8
PIN
FUNCTION
NAME
I/O
NO.
61
VDD2
Power supply
62
XILT
I
Test terminal (Connect it with the power supply.)
63
IDSL
I
Test terminal (Connect it with the power supply.)
64
SICK
I
Test terminal (Connect it with the power supply.)
65
DIDT
I
Test terminal (Connect it with the power supply.)
66
ACLK
I
Serial transfer clock (128 Fs) input of ATRAC data
67
BCK
I
2.8224 MHz (64 Fs)
68
LRCK
I
44.1 kHz (Fs)
69
ADIN0
I
REC audio data input 0
70
DOUT0
O
Replay audio data output 0
71
ADIN1
I
REC audio data input 1
72
DOUT1
O
Replay audio data output 1
73
ADIN2
I
REC audio data input 2
74
DOUT2
O
Replay audio data output 2
75
ADIN3
I
REC audio data input 3
76
DOUT3
I
Replay audio data output 3
77
TA2
I
78
TA3
I
79
TA4
I
80
TA5
I
81
TA6
I
82
TA7
I
Test terminal (Connect it with the ground.)
83
TA8
I
84
TA9
I
85
TA10
I
86
TA11
I
87
TA12
I
88
TD0
I
89
TD1
I
90
VSS
Ground
91
OSCI
I
Crystal oscillator input (1024 Fs)
92
OSCO
O
Crystal oscillator output (1024 Fs)
1
5
1
5
0
8
9
2
4
93
SP0
O
1/2 oscillator output (512 Fs)
94
TD2
I
95
TD3
I
96
TD4
I
97
TD5
I
98
TD6
I
99
TD7
I
100
TD8
I
101
TD9
I
102
TD10
I
103
TD11
I
104
TD12
I
105
TA13
I
106
TA14
I
Test terminal (Connect it with the ground.)
107
TA15
I
108
TA16
I
109
TA17
I
110
TA18
I
111
TA19
I
112
TA20
I
113
TA21
I
114
TA22
I
115
TA23
I
116
TS0
I
117
TS1
I
118
TS2
I
119
TS3
I
120
VSS4
Ground
m
c o
2
9
9
FUNCTION
9
8
2
9
9

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