Pioneer DEH-P8400MP Service Manual page 78

Multi-cd/dab control high power cd/mp3/wma player with rds tuner
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DEH-P8400MP
- Pin Functions (PE5269A)
Pin No.
Pin Name
1
FTXD
2
NC
3
BSI
4
BSO
bsck
5
6, 7
DFS1, 2
8
DCKS
9
EVDD
10
EVSS
11
NC
12
DCOPY
crst
13
14-16
CBANK0-2
emph
17
18
DSPMUTE
19
DSET
adena
20
21
IC/VPP
22
BRXEN
bsrq
23
xtalen!
24
xtalen@
25
xrst
26
27
VDCONT
28
CD3VON
29
CONT
xwait
30
31
LOEJ
32
CLCONT
33
CDMUTE
reset
34
35
XT1
36
XT2
37
REGC
38
X2
39
X1
40
VSS
41
VDD
42
CLKOUT
xwrite
43
uben
44
45
WR/W
xread
46
47
XASTB
48
LOCK
wrst
49
50-57
AD0-7
58
BVDD
59
BVSS
60-67
AD8-15
xcs
68
wcs
69
70, 71
DBBWRDY0, 1
72, 73
DBBRRDY0, 1
74
AVDD
75
AVSS
78
I/O
Format
Function and Operation
O
C
For rewriting Flash EP-ROM (sending signals)
Open
I
Input of P-Bus serial data
O
C
Output of P-Bus serial data
I/O
/C
Input/output of P-Bus serial clock
O
C
Output 1, 2 of settings of DA I/F IC sampling frequency
O
C
Output for selection of DA I/F IC clock subharmonic number
Positive power supply for E power
Potential of GND of E power
Open
O
C
Output of settings of DA I/F IC copy flag
O
C
Output of reset control of Compression IC
O
C
Output 0-2 of bank settings of Compression IC
O
C
Output of information on emphasis
O
C
Output of DOUT Mute
O
C
Output for lighting the disc set indicator
O
C
Output of control of A/D reference voltage supply
IC: connected directly to VSS / VPP: Pull-down
I/O
/C
P-Bus receiving enabled
I/O
/C
Request for P-Bus service request
O
C
Output of permission to oscillate CD LSI 16.9344MHz
O
C
Output of permission to oscillate CD LSI 24.576MHz
O
C
Output of control of CD LSI reset
O
C
Output of control of VD power supply
O
C
Output of control of CD +3.3V power supply
O
C
Output of control of power supply to servo driver
I
Input of control signals of CD LSI wait
O
C
Output for switching between LOAD/EJECT directions
O
C
Output for switching between driver inputs
O
C
Output of control of CD Mute
I
Input of system reset
I
Connected to the oscillator for subclock
(connected to VSS via the resistor)
Connected to the oscillator for subclock (Open)
Connected to the capacity stabilizing output of the regulator
(an electrolytic capacitor of about 1µF)
Connected to the oscillator for the main clock
I
Connected to the oscillator for the main clock
Potential of GND
Positive power supply (5V)
O
C
Output of internal system clock (Open)
O
Output of control signals of CD LSI light
O
Not used (Open)
O
Output of Read/Write control signals of WMA decoder
O
Output of read control signals of CD LSI
O
Output of CD LSI address strobe
I
Input of spindle lock
O
C
Output for reset control of WMA decoder
I/O
/C
Address/Data Bus 0-7
B power supply, positive supply (3.3V)
B power supply, potential of GND
I/O
/C
Address/Data Bus 8-15
O
C
Output for chip selection of CD LSI
O
C
Output for chip selection of WMA decoder
I
Input of write-ready flag with WMA decoder DBBI0, 1
I
Input of read-ready flag with WMA decoder DBBO0, 1
A power supply, positive supply (5V)
A power supply, potential of GND

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