Diagram & Description - Sanyo MCD-Z8F Service Manual

i
IC BLOCK DIAGRAM & DESCRIPTION
IC101 LA9220MS (Servo
Signal Processor)
NO. IPIN NAMEII / 01 FUNCTION
1
FIN2
I I Connection Pin for Photo Diode of Pickup.
2 i FIN1 I I t FIFJ2+FIN1 =RF. FIN2-FIN1 =FE
31E
I i I
Corrne t"
c Ion Pin for Photo Diode of Pickup.
4 F I
I E-F= TE
5
I TB
I
I
Irmut
Pin for DC ingredient of TE Sianal.
6
TE- 1 Connection Pin for Gain Setting Resistor of TI
Signal to TE Signal pin.
7 TE
o OutDut Pin for Trackina Error Sicmal .
8 ITESI I I ]lnput Pi f
n or Track Error Sense Comparator. TI
I Signal through Band pass, and Inputted.
9
I Scl
I i I
InOut Pin for Shock Detection.
10 TH I Connection Pin for Time Constant Setting c
Tracking Gain.
11 TA o Output Pin for TA Amplifier.
12 TD- 1 Connection Pin for Constant of Tracking Phasl
Compensation, Consist of between TD and VR
13 TD I
Connection Pin for Constant of Tracking Phase
Compensation.
14 JP I Connection Pin for Amplitude Setting of Track
ing Jump (Kick Pulse) Signal.
15 TO
o Output Pin for Tracking Controf Signal.
16 FD o Outout Pin for Focusina Control Sianal.
17 I FD- I I I Connection Pin for Constant of Focusing Phase
I
I Compensation, Consist of between FD and FA.
18 I FA+
I I Connection Pin for Constant of Focusing Phasf
I
I I Compensation,
Consist of between FD- am
I
I FA-.
19 ] FA- 1 I Connection
Pin for Constant of Focusing Phase
I
I I Compensation. Consist of between FA and FE.
20 I FE
I O I Output Pin for Focusing Error Signal .
21 FE-
1 I Connection Pin for Gain Setting Resistor of FE
I
I I Sianal to FE Sianal ~in.
22 I AGND I - I Ground for Anaioa Sianal.
23 I SP I O I Output Pin for Single End of Input Signal of the
CV +, CV- Pin.
24 I SPI I I I Inout Pin for Soindle Amohfier.
25\ SPG I I [ Connection Pin for Gain Setting Resistor, when
Spindle 12 cm Mode.
26 sP-
1 Connection Pin for Constant of Spindle Phasf
Compensation with SPD Pin.
27 SPD
o Oulput Pin for Spindle Control Signal.
28 SLEQ
I Connection Pin for Constant of Sled PhasE
Compensatian.
29 SLD
o Output Pin for Sled Control Signal.
30 SL- 1 Input Pin for Sled Signal from Micro Processor.
31 I SL+ Ill
32 JP-
1:1
Input Pin for Tracking Jump Signal from Digital
33 JP + Sianal Processor.
34 TGL
I
Input Pin for Tracking Gain Control Signal from
Digital Signal Processor. TGL = H: Gain Low
No. IPIN NAME] I /0 ] FUNCTION
35 I TOFF
I I
Input Pin for Tracking Off Control Signal from
I I
I Dialtal Sianal Processor. TOFF = H: Off
I
36 TES
o Output Pin for Track Error Sense Signal to
Digital Signal Processor.
37 HFL
i High Frequency Level Signal use Detection
Main-Beam Position is on the oit or mirror.
I
38 SLOF
I Input Pin for Sled Servo Off Control.
39
cv- 1 Input Pin for Constant Linear Velocity Error
40 Cv +
I
Signal from Digital Signal Processor.
41 RFSM o Output Pin for RF Signal.
42 RFS- 1 Connection Pin for Gain Setting of RF and
Constant Setting of 3T Compensation of the
EFM Sional with RFSM Pin.
43 SLC o Slice Level Control Signal is Output Pin, It
Control Level of Data-Slice by Digital Signal
Processor of the RF Waveform.
44 I
SLI I I I Input Pin for Level Control of Data-Slice by I
I I
Digital Signal Processor.
45 I DGND I - I Ground for Diaital Sianal.
{
46
vc- 1
Input Pin For VCO Control Amplifier, Consist
of PLL LOOP Filter with VCOC and PDO of
Diaital Sianal Processor.
. .
47 1 Vcoc
I
O I Output Pin for VCO Control Signal.
48
Vco o Output Pin for VCO Signal.
49 DEF o Output Pin for Defect Detection of Disc.
50 CLK
I Input Pin for Reference Clock Pulse, Input
4.23 MHz of Digital Signal Processor.
51 CL
I Input Pin of Clock Pulse for Command from
I I
I Micro Processor.
52 I DAT I I I Input Pin of Data for Command fram Micro
I 1
Processor.
53 I CE
I Input Pin of Chip Enable for Command from
I I
I Micro Processor.
54 I DRF I O I Detect RF Signal is Output Pin for RF Level
Detection.
55 I LF I
I
I Connection Pin for Adiustirm of VCO Free-run.
56 I VCC2 I - I VCC for Servo and Digital Root.
57 I REFI
I
I Bus Control Connection Pin for Reference
I I
I Voltaae.
58 VR o Output Pin for Reference Voltage.
59
LF2 I Connection Pin for Time Constant Setting of
Defect Detection of the Disc.
60 PHI 1 Capacitpr Connection Pin for Peak-hold of RF
I
] Signal.
61 I BH1
1
I Capacitor Connection Pin for Bottom-hold of
I
I
I RF Sianaf.
62 I LDD I O I Output Pin of APC (Automatic Power Control)
Circuit.
63 LDS
I Input Pin of APC (Automatic Power Control)
Circuit.
64 Vccl I
VCC for RF Root
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