Sony HCD-EC69i Service Manual page 42

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HCD-EC69i/EC79i/EC99i
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3 7 63 1515 0
• IC Pin Function Description
CD BOARD IC101 TC94A70FG-006 (CD-MP3 PROCESSOR)
Pin No.
Pin Name
1
AVSS3
2
RFZi
3
RFRP
4
SBAD/RFDC
5
FEi
6
TEi
7
TEZi
8
AVDD3
9
FOo
10
TRo
11
VREF
12
FMo
13
DMo
14
VSSP3
15
VCOi
16
VDDP3
17
VDD1
18
VSS1
19
FGiN
20
IO0 (/HSO)
21
IO1 (/UHSO)
22
XVSS3
23
TE
XI
L 13942296513
24
XO
25
XVDD3
26
DVSS3
27
RO
28
DVDD3
29
DVR
30
LO
31
DVSS3
32
VDDT3
33
VSS1
34
VDD1
35
VDDM1
36
SRAMSTB
37
XRST
38, 39
BUS0, BUS1
40
BUS2 (SO)
41
BUS3 (SI)
42
BUCK (CLK)
43
XCCE
44
TEST
45
IRQ
46
AoUT3 (PO4)
47
AoUT2 (PO5)
48
PIO0
www
49, 50
PIO1, PIO2
51
PIO3
52
VSS1
.
53
VDDT3
54
SBSY
55
SBOK/FOK
42
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I/O
-
Ground terminal
I
RF ripple zero crossing signal input terminal
O
RF ripple signal output terminal
O
Sub beam addition signal or RF peak detection signal output terminal
O
Focus error signal output terminal
O
Tracking error signal output terminal
I
Tracking error zero crossing signal input terminal
-
Power supply terminal (+3.3V)
O
Focus coil drive signal output terminal
O
Tracking coil drive signal output terminal
I
Reference voltage (+1.65V) input terminal
O
Sled motor drive signal output terminal
O
Spindle motor drive signal output terminal
-
Ground terminal
I
VCO control voltage input terminal
-
Power supply terminal (+3.3V)
-
Power supply terminal (+1.5V)
-
Ground terminal
I
FG signal input terminal
I
Disc inner position detection signal input terminal
O
Not used
-
Ground terminal
I
System clock input terminal (16.9344 MHz)
O
System clock output terminal (16.9344 MHz)
-
Power supply terminal (+3.3V)
-
Ground terminal
O
Audio data (R-ch) output to the electrical volume
-
Power supply terminal (+3.3V)
O
Reference voltage (+1.65V) output terminal
O
Audio data (L-ch) output to the electrical volume
-
Ground terminal
-
Power supply terminal (+3.3V)
-
Ground terminal
-
Power supply terminal (+1.5V)
-
Power supply terminal (+1.5V)
I
S-RAM standby mode control signal input terminal
I
Reset signal input from the system controller
I
Serial data input from the system controller
I
Serial data input from the system controller
I
Serial data input from the system controller
I
Serial data transfer clock signal input from the system controller
I
Chip enable signal input from the system controller
I
Setting terminal for test mode
I
Interrupt request signal input terminal
O
Request signal output terminal
O
Audio data output terminal
O
Request signal output to the system controller
O
Not used
x
ao
u163
I
Gate signal input terminal
y
-
Ground terminal
i
-
Power supply terminal (+3.3V)
O
Subcode block sync signal output to the system controller
O
Not used
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2 9
8
Description
Not used
Not used
Q Q
3
6 7
1 3
1 5
Fixed at "L" in this set
"L": reset
Normally fi xed at "L"
Not used
Not used
Not used
co
Not used
.
9 4
2 8
Not used
0 5
8
2 9
9 4
2 8
m
9 9
9 9

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