Schematic Diagram (Dsp) - Yamaha DSP-AX620 Service Manual

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SCHEMATIC DIAGRAM (DSP)

1
Point q (Pin 1 of IC801)
V : 2V/div, H : 50 nsec/div
DC, 1 : 1 probe
0V
2
3
IC803 : PQ025EZ5MZP
+2.5V Regulator
DC INPUT (VIN) 1 3 DC OUTPUT (VO)
I C
4.9
2 ON/OFF CONTROL (VC)
5 0
GND
4.9
0
4.9
0
4.9
µ
IC811, 813–817 : PC4570G2
IC807 : NJM2904M-T1
Dual OP Amp
4
OUT 1 +V
1 8 CC
–IN 2 7 OUT 4.7
1 2
+ – + –
0
+IN 3 6 –IN
1 2
3.9
–V 4 5 +IN
CC 2
4.9
0
IC805 : TC74HC00AF
3.9
Quad 2 Input NAND
A1 1 V
14 DD
4.9
B1 2 13 B4
0
5
Y1 3 12 A4
3.9
A2 4 11 Y4
B2 5 10 B3
Y2 6 9 A3
V SS 7 8 Y3
IC808 : TC74HCUO4AF-TP1
Hex Inverters
1A 1 14 V
DD
1Y 2 13 6A
6
2A 3 12 6Y
2Y 4 11 5A
3A 5 10 5Y
3Y 6 9 4A
V SS 7 8 4Y
IC806 : TC74VHCT08AF
Quad 2 Input AND
A1 1 14 V DD
7
B1 2 13 B4
3
Y1 12 A4
A2 4 11 Y4
B2 5 10 B3
Y2 6 9 A3
V SS 7 8 Y3
8
9
IC818 : AK4382-VT-E2
D/A Converter
MCLK
1
14 VDD
CSN 6
DE-EMPHASIS CLOCK
µP 13 VSS
CONTROL DIVIDER
CCLK 7
INTERFACE
16 DZFL
CDTI 8
15 DZFR
10
∆ ∑ AOUTL+
LRCK 4 8X 12
SCF
INTERPOLATOR MODULATOR
11 AOUTL–
AUDIO
BICK 2 DATA
INTERFACE
∆ ∑ 10 AOUTR+
8X
SCF
SDTI 3 INTERPOLATOR MODULATOR AOUTR–
9
5
PDN
D E F
2.5 4.9
3.4 4.9
0 4.7 4.9
3.4 4.9
2.5 0
3.4
0 0
4M
DRAM
4.9 0
1.4
1.3
~
1.4
~
1.4
~
1.3
0
4.9 0
2.5
2.5 1.3
0.4
2.5 1.3
0
2.5 1.3
3.4
2.5 1.3
2.1
2.1
3.1
1.7 2.0
~
1.1 ~
1.8 ~
~ ~
~ ~
0
4.9 0
0
0
3.4
4.7
4.6
1
0 0.3 0.3
3
0.1
2
4.8
DVD DIGITAL
4.8
5 4.8
4 0
3.9
6
0
3.9
3.9
4.9 0
q
3.4
4.9
2.5
4.9 14
3.6
3.6 4.9 4.9
0
2.6 0
7
0
4
0 0
0
0
5
7 0
0 6
0
4.9
3.1 0 0 0 0
2.6 0 0 4.9
0
0
IC812 : AK4527VQ
96kHz 24 bit 6ch CODEC
L IN+
A D C H P F
L IN–
MCLK
R IN+
LRCK
A D C H P F
R IN–
BICK
SDOS 1 33 DZF2
I2C 2 32 RIN+
SMUTE RIN–
3 31
BICK LIN+
4 30 A U D I O
L OUT1 L P F DAC DATT
LRCK 5 29 LIN– I / F
SDTI1 6 28 ROUT1
R OUT1 SDOUT
L P F DAC DATT
SDTI2 7 27 LOUT1
SDTI3 8 26 ROUT2
L OUT2 L P F DAC DATT
SDTO 9 25 LOUT2 SDIN1
SDIN2
D AUX 10 24 ROUT3
R OUT2 L P F DAC DATT
SDIN3
DFS 11 23 LOUT3
L OUT3 L P F DAC DATT
R OUT3 L P F DAC DATT
G H
P-E69/J67
I-9
to INPUT (1)
~
~
1.4
2.5
0
0
0
3.4
3.4
0
0
0
0
3.4
0
0
AC3D3
0
0.1
0
3.4
1.7
1.7
1.7
0
0
0
2.5
0
1.1
4.8
IC802 : MSM514260C-60JS
262,144-word x 16 bit Dynamic RAM
WE
VCC 1 40 VSS TIMING
RAS
GENERATOR
DQ1 2 39 DQ16
DQ2 3 38 DQ15
LCAS
DQ3 4 37 DQ14
MCLK
UCAS
DQ4 5 36 DQ13
LRCK
VCC 6 35 VSS
BICK
DQ5 7 34 DQ12
COLUMN
DQ6 DQ11
DAUX 8 33 9 ADDRESS
DQ7 DQ10 BUFFERS
9 32
DQ8 10 31 DQ9
FORMAT
NC 11 30 NC
CONVERTER INTERNAL
REFRESH
NC 12 29 LCAS A0~A8 ADDRESS
CONTROL CLOCK
COUNTER
WE 13 28 UCAS
RAS 14 27 OE
NC 15 26 A8
SDOS ROW
ROW WORD
A0 16 25 A7 9 ADDRESS 9
DECODERS DRIVERS
SDTO BUFFERS
A1 17 24 A6
SDTI1
A2 18 23 A5
SDTI2
VCC
A3 19 22 A4
SDTI3
VCC 20 21 VSS
ON CHIP
VBB GENERATOR
VSS
I J K
L/R
0
0 0 0
4.9
–11.3
4.9
0
1.7
1.7
~ 0 0
0
0
0 0
3.4 2.5
4.9 2.5
4.1 2.5
0.1 2.5
D/A
CONVERTER
0 4.9 0
4.9
0
4.9 4.9
CODEC
(A/D & D/A CONVERTER)
FL/FR
0
C/LFE
0 2.5
2.5
0
1.7 2.5
1.7 2.5
0 2.4
0 2.4
0.1 2.4
~
2.4
2.4
0
0 2.4
RL/RR
0 0 0 –11.3
0 0
0
0 0 0 –11.3
0 0
0
0 0 0 –11.3
0 0
0
0 0 0 –11.3
0 0
0
0 0
0 –11.3
0 0
0
0 0 0 –11.3
0 0
0
OE
I/O
CONTROLLER
OUTPUT
8 8
I/O BUFFERS
CONTROLLER
DQ1~DQ8
COLUMN
9 INPUT 8
DECODERS 8
BUFFERS
SENSE I/O
16 16
AMPLIFIERS SELECTOR
INPUT
8 8
BUFFERS
MEMORY
DQ9~DQ16
CELLS
OUTPUT
8 8
BUFFERS
L M N
DSP-AX620
L
11.9
2
8
1
0
3
0
0
–11.2 0
0.7 0
0
0
0
0
0.7
0
0
–11.2
5
0 7
6 0
0 4
–11.8
8 6
11.9
8
7 2.5 11.9 2
2.5 1
2.5
2.5
5 2.5
2.5
3
5
3 7 2.5
2.5 2.5 6
1
2.5 2 –11.8 4 2.5
–11.8
4 2.5
–11.8
C
11.9
3
8
0 1
2
0
0 0
–11.2
0
0
–11.2
0 6
0 7
5 0
4
0
–11.8
FL
11.9
8
5
0 7
6 0
0 0
–11.2
0
0
–11.2
0 2
0 1
3
0
4
0
–11.8
RL
11.9
3 8
0 1
2 0
0 0
–11.2
0
0
–11.2
0 6
0 7
5
0
4
0
–11.8
Conditions
• INPUT: DVD auto
• PROGRAM: PRO LOGIC DSP
* All voltage are measured with a 10MΩ/V DC electric volt meter.
* Components having special characteristics are marked Z and
must be replaced with parts having specifications equal to those
originally installed.
* Schematic diagram is subject to change without notice.
E-68/J-66