Sony PCM-D50 Service Manual page 53

Linear pcm recorder
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• IC Pin Function Description
SYSTEM BOARD (1/5) IC1001 MC-10051F1-FAE-A (SYSTEM CONTROL/DSP)
Pin No.
Pin Name
A1, A2, A3
NC
A4
NAND_WEZ
A5
IO_B
A6
PBIAS
A7
VUSBLOG
A8
VUSBPLL
A9, A10
PHYXO, PHYXI
A11
UPLLGND1
A12, A13
USBAGND1
A14, A15
DM, DP
A16
USBIOVDD
A17
VCCVBUS
A18
USBTEST5
A19
IO_A
A20
VDD_L0
A21, A22
AB0_A8, AB0_A13
A23
AB0_A17
A24 to A26
NC
B1, B2
NC
B3
NAND_CSZ2
B4
NAND_DA0
B5
IO_B
B6
ADIN4
B7
ADIN6
B8
ADINB
B9
ADVCC
B10
CPIN
B11
VUSBREFGND
B12
ULOGGND
B13
SWGND
B14
USB_DATA4
B15
SWADP2
B16
USBDGND
B17
VCCADP
B18
USBTEST4
B19
IO_A
B20
VDD_L0
B21, B22
AB0_A9, AB0_A14
B23, B24
AB0_A18, AB0_A21
B25, B26,
NC
C1
C2
NAND_CSZ1
C3
NAND_CSZ3
C4
NAND_DA1
C5
IO_B
C6
ADIN3
C7
ADIN5
C8
ADIN7
C9
ADGND
C10
USB_DATA0
C11
USB_DIR
C12
USB_DATA2
C13
USB_CLK
C14
USB_DATA5
I/O
Not used (Open)
O
Write enable signal output to the NAND ROM
Power supply (VDD_GP1)
Not used (Open)
Not used (Open)
Not used (Open)
Not used (Open)
Not used (Open)
Not used (Open)
Not used (Open)
Not used (Open)
I
VBUS detect signal input
Not used (Open)
Power supply (VDD_IOA)
Power supply (VDD_L0)
Not used (Open)
Not used (Open)
Not used (Open)
Not used (Open)
O
Chip select signal output to the NAND ROM
I/O
Date input/output with the NAND ROM
Power supply (VDD_GP1)
I
DCIN_AD signal input (A/D input)
I
Key input (A/D input)
I
Key input (A/D input)
O
VDD_ADC power supply output
Not used (Open)
Not used (Open)
Not used (Open)
Ground
Not used (Open)
Not used (Open)
Not used (Open)
O
VCCADP power supply output
Not used (Open)
Power supply (VDD_GP1)
Power supply (VDD_L0)
Not used (Open)
Not used (Open)
Not used (Open)
O
Chip enable signal output to the NAND ROM
O
Chip enable signal output (Not used in this set)
I/O
Date input/output with the NAND ROM
Power supply (VDD_GP1)
I
DCIN_AD signal input (A/D input)
I
Key input (A/D input)
I
Key input (A/D input)
Ground
Not used (Open)
Not used (Connected ground)
Not used (Open)
Not used (Connected ground)
Not used (Open)
Description
PCM-D50
53

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