Line Printer Controls And Indicators - Honeywell LEVEL 6 Operation Manual

STATUS WORD
NDN CORRECTABLE
MEMORY ERROR
END OF FORM
BUS PARITY
ATTENTiON
' - -_ _ _ _ ~~~~~CTED MEMORY
' - - - D E V I C E READY
• UNUSED BITS ARE ALWAYS ZERO
Figure 7-5. Status Bits Assignment
If the interrupt level is zero due either to
initialize, master clear or being explicitly set, no
interrupt will be issued for the channel. If a
condition or event occurs which would normally
cause an interrupt, the appropriate bits in the
status word will be set, but no interrupt will be
attempted or saved. A test for completion of
operation may be made by attempting to issue an
instruction to the channel. A busy channel will
result in a NAK response.
LINE PRINTER CONTROLS AND INDICA­
TORS
Line printer controls and indicators necessary
for normal printer operation with the exception
of the circuit breaker and PRINT INHIBIT switch
are located at the front of the printer, as shown in
Figure 7-6; followed by a description of each.
The machine hood however, must be raised (as
shown in Figure 7-6) for access to the FORMS
Figure 7-6. Line Printer Operator Panel
RESET and 6LPI/8LPI controls, as they are
concealed from view with the hood closed.
The ac circuit breaker is located at the front of
the printer directly below the control panel as
shown in Figure 7-1. The PRINT INHIBIT switch
is mounted on a logic card that is located on the
left side of the printer on the inside door of the
TABLE 7-4. STATUS BIT DEFINITIONS
Status Condition Bit
Definitions Reset By
Device Ready 0
Printer power on. No faults. Paper loaded. A change in conditions.
No open interlocks. Switches in correct
positions
Non-Existent Resource 13
A NAK was received from memory. Indi- Next IOLD Command.
cates possible programming error (non­
existent memory)
End Of Form
3 The printer has detected End Of Form by
Next IOLD Command.
I
spacing to or past a predetermined position
on paper or by spacing under control of
channel 11 of the VFU option to a pre­
determined position on paper.
Attention
2
The device ready condition has changed. Reading status wd 1
clears this bit.
Parity 14 The parity was incorrect on a bus transfer
Next IOLD Command.
toward the MDC.
Corrected Memory Error 12
The memory read response was accompanied Next IOLD Command.
by a BSYELO- signal
Uncorrectable Memory Error
15 The memory read response was accompanied Next IOLD Command.
by
a BSREDD- signal
LINE PRINTERS 7-5
AT04