Table of Contents
Advertisement
DV-5050M/5900M/DVF-J6050/J6050-G
QQ
3 7 63 1515 0
Port No.
47~51,54~59,61~65
67
68
69
71
72
74~78,80~82
84
85
86
87
88
89
90
91
92
93
94,95
97~102,106,108,109
103
107
110
111
113
TE
L 13942296513
114
115
117~119
121
122
123
124
125
126,136
127
128
129
130
131,141
132
133
134
135
137
138
139
140
143
www
144
146
148~155
158,159,161,162
.
164,165,167,168
170,171,173,175
177,178,180,181
12
CIRCUIT DESCRIPTION
Port Name
I/O
HD0~HD15
I/O
DVD microcomputer data bus 0~15.
AUDSTR
I
Valid signal of bit stream input data.
ARQ
0
Unused.
VSTR
I
Clock signal input for bit stream.
VRQ
O
Request of program stream.
AVRTM
I
Sector separation signal.
STD0~STD7
I
Bit stream parallel input 0~7.
EXTCK
I
External FS384 input terminal.
APLLVDD
-
Supply voltage (+2.5V) of internal logic for Audio PLL..
P5481
-
Audio PLL ground.
PHCOPMO
O
Audio PLL phase comparison output.
APLLAVSS
-
Audio PLL ground.
NC
-
Unused.
APLLAVDD
-
Supply voltage (+3.3V) for Audio PLL..
ACKIO
-
Connected to digital ground.
VSS
-
Digital ground.
DCTEST
-
Connected to digital ground.
TESTSEL1,0
-
Connected to digital ground.
TEST4~TEST9
O
Unused.
TEST3,1,0
CLKMON
O
Unused.
RFF
O
Unused.
IECOUT
O
IEC958 format data output.
DMIX
O
Audio down mix signal output.
DACCK
O
Over sampling DAC clock output
LRCK
O
LR clock output.
SRCK
O
Bit clock output.
ADOUT(0~2)
O
Audio data output (0~2).
XPOWD
I
DAC power down control input.
VREFC
I
DAC reference voltage input for C signal.
IREFC
I
DAC bias current setting port for C signal.
COMPC
I
Capacitance connection for DAC (C signal) stabilization.
VCOUT
O
Unused.
AVDD
-
Analog supply voltage (+3.3V) for DAC.
VREFCB
I
DAC reference voltage input for CB signal.
IREFCB
I
DAC bias current setting port for CB signal.
COMPCB
I
Capacitance connection for DAC (CB signal) stabilization.
VCBOUT
O
Unused.
AVSS
-
Analog ground for DAC.
VREFCR
I
DAC reference voltage input for CR signal.
IREFCR
I
DAC bias current setting port for CR signal.
COMPCR
I
Capacitance connection for DAC (CR signal) stabilization.
VCROUT
O
Unused.
VREFY
I
DAC reference voltage input for Y signal.
IREFY
I
DAC bias current setting port for Y signal.
COMPY
I
Capacitance connection for DAC (Y signal) stabilization.
VYOUT
O
Unused.
XYSYNCO
I/O
Vertical synchronizing signal input/output.
XHSYNCO
I/O
Horizontal synchronizing signal input/output.
VCLK
O
Clock output for digital video data output.
x
ao
y
VD0~VD7
O
Digital video data output (0~7).
i
MDQ0~MDQ15
I/O
SDRAM data bus (0~15).
8
Function
Q Q
3
6 7
1 3
u163
.
2 9
9 4
2 8
1 5
0 5
8
2 9
9 4
m
co
9 9
2 8
9 9
Advertisement
Table of Contents
