Pin Layout - JVC MX-G50 Service Manual

MX-G50/MX-G56
5L9290 (IC201) :

1. Pin layout

VSSA_PLL
VCO1LF
VSSD_PLL
VDDD_PLL
VDDD1_5V
VSSD1_5V
2. BLOCK DIAGRAM
VCO1LF
EFMI
LOCK
SMEF
SMDP
SMDS
WDCK
WFCK
RFCK
C4M
Generator
XIN
ISTAT
Interface
MLT
MDAT
MCK
MUTE
1-32
DIGITAL SIGNAL PROCESSOR FOR CDP
48 47 46 45 44
1
2
3
4
5
S5L9290X
XIN 6
DSP+DAC
XOUT 7
48-LQFP-0707
8
EFMI 9
LOCK 10
SMEF 11
SMON 12
13 14 15 16 17
SOS1
SQCK
SQDT
SBCK
SBDT
Subcode
Out
DPLL
EFM
Demodulator
CLV
ECC
Servo
Timing 16K
SRAM
Micom
Address
Generator
JITB
43 42 41 40 39 38 37
18 19 20 21 22 23 24
C2PO DATX
Digital
Interpolator
I/O
Interface
SADTO SADTI
LRCKO LRCKI
BCKO BCKI
36 BCKO
35 LRCKO
34 SADTO
33 DATX
32 C2PO
31 JITB
30 SBCK
29 VDDD3-5V
28 VSSD2-3V
27 VDDD2-3V
26 MUTE
25 SQDT
Out
Digital
Filter
1-bit
DAC
PWM
LPF
VHALF
LCHOUT
VREF
RCHOUT