Sony AVD-S50 Service Manual page 26

AVD-S50/S50ES
• DVD BOARD IC607 CXD9617R (AUDIO DIGITAL SIGNAL PROCESSOR)
Pin No. Pin Name
1 VSS
2 XRST
3 EXTIN
4 FS2
5 VDDI
6 FS1
7 PLOCK
8 VSS
9 MCLK1
10 VDDI
11 VSS
12 MCLK2
13 MS
14 SCKOUT
15 LRCKI1
16 VDDE
17 BCKI1
18 SDI1
19 LRCKO
20 BCKO
21 VSS
22 KFSIO
23 SDO1
24 SDO2
25 SDO3
26 SDO4
27 SPDIF
28 LRCKI2
29 BCKI2
30 SDI2
31 VSS
32 HACN
33 HDIN
34 HCLK
35 HDOUT
36 HCS
37 SDCLK
38 CLKEN
39 RAS
40 VDDI
41 VSS
42 CAS
43 DQM
44 CS0
45 WE0
26
I/O
— Ground terminal
I Reset signal input from the system controller "L": reset
I Master clock signal input terminal Not used. (Fixed at "L" in this set.)
I Sampling frequency selection signal input terminal Not used. (Fixed at "L" in this set.)
— Power supply terminal (+2.6 V)
I Sampling frequency selection signal input terminal Not used. (Fixed at "L" in this set.)
O Internal PLL lock signal output terminal Not used. (Open)
— Ground terminal
I System clock signal input terminal (13.5 MHz)
— Power supply terminal (+2.6 V)
— Ground terminal
O System clock signal output terminal (13.5 MHz)
Master/slave selection signal input terminal
I
"L": slave, "H": master (fixed at "L" in this set.)
O Internal system clock signal output to the D/A converter and stream processor
I L/R sampling clock signal (44.1 kHz) input from the digital audio processor
— Power supply terminal (+3.3 V)
I Bit clock signal (2.8224 MHz) input from the digital audio processor
I Front L-ch and R-ch audio serial data input from the digital audio processor
O L/R sampling clock signal (44.1 kHz) output to the D/A converter and stream processor
O Bit clock signal (2.8224 MHz) output to the D/A converter and stream processor
— Ground terminal
I Audio clock signal (11.2896 MHz) input from the digital audio processor
O Front L-ch and R-ch audio serial data output to the stream processor
O Center and woofer audio serial data output to the stream processor
O Rear L-ch and R-ch audio serial data output to the stream processor
O Audio serial data output to the D/A converter
O S/PDIF signal output terminal Not used. (Open)
I L/R sampling clock signal (44.1 kHz) input from the A/D converter
I Bit clock signal (2.8224 MHz) input from the A/D converter
I Center and woofer audio serial data input from the digital audio processor
— Ground terminal
O Acknowledge signal output to the system controller
I Write data input from the system controller
I Clock signal input from the system controller
O Read data output to the system controller
I Chip select signal input from the system controller
O Clock signal output terminal Not used. (Open)
O Clock enable signal output terminal Not used. (Open)
O Row address strobe signal output terminal Not used. (Open)
— Power supply terminal (+2.6 V)
— Ground terminal
O Column address strobe signal output terminal Not used. (Open)
O Output terminal of data input/output mask Not used. (Open)
O Chip select signal output to the S-RAM
O Write enable signal output to the S-RAM
Pin Description